[kernel] r19986 - in dists/sid/linux/debian: . patches patches/bugfix/x86 patches/features/all/drm
Ben Hutchings
benh at alioth.debian.org
Sun Apr 28 20:25:13 UTC 2013
Author: benh
Date: Sun Apr 28 20:25:13 2013
New Revision: 19986
Log:
drm, agp: Update to 3.4.42
Annoyingly, the i915 inverted brightness quirks didn't go into 3.4.y yet,
so add them back.
Added:
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-e725.patch
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-g725.patch
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-packard-bell-ncl20.patch
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk_invert_brightness-for-ncr-machine.patch
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-acer-aspire-5734z.patch
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-via-parameter.patch
dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-via-quirk.patch
Modified:
dists/sid/linux/debian/changelog
dists/sid/linux/debian/patches/features/all/drm/drm-3.4.patch
dists/sid/linux/debian/patches/series
Modified: dists/sid/linux/debian/changelog
==============================================================================
--- dists/sid/linux/debian/changelog Sun Apr 28 19:21:19 2013 (r19985)
+++ dists/sid/linux/debian/changelog Sun Apr 28 20:25:13 2013 (r19986)
@@ -82,13 +82,16 @@
* Input: MT: add tracking and frame synchronisation to core
* Input: add support for Cypress PS/2 Trackpads (Closes: #703607),
thanks to Apollon Oikonomopoulos
- * drm, agp: Update to 3.4.39:
+ * drm, agp: Update to 3.4.42:
- drm/i915: restrict kernel address leak in debugfs
- KMS: fix EDID detailed timing vsync parsing
- KMS: fix EDID detailed timing frame rate
- drm/radeon: add support for Richland APUs
- drm/radeon/benchmark: make sure bo blit copy exists before using it
- drm/i915: Don't clobber crtc->fb when queue_flip fails
+ - drm/i915: Use the correct size of the GTT for placing the per-process
+ entries
+ - udl: handle EDID failure properly.
* [rt] Update to 3.2.43-rt63
* debugfs: Document change of default mode
* iwlwifi: Do not request firmware API version 6 for IWL6005/6205
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-e725.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-e725.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,26 @@
+From: Jani Nikula <jani.nikula at intel.com>
+Date: Tue, 22 Jan 2013 10:50:35 +0000
+Subject: drm/i915: add quirk to invert brightness on eMachines e725
+
+commit 01e3a8feb40e54b962a20fa7eb595c5efef5e109 upstream.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=31522#c35
+[Note: There are more than one broken setups in the bug. This fixes one.]
+Reported-by: Martins <andrissr at inbox.lv>
+Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+---
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 44f9d8f..8575a62 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8602,6 +8602,9 @@ static struct intel_quirk intel_quirks[] = {
+
+ /* Acer/eMachines G725 */
+ { 0x2a42, 0x1025, 0x0210, quirk_invert_brightness },
++
++ /* Acer/eMachines e725 */
++ { 0x2a42, 0x1025, 0x0212, quirk_invert_brightness },
+ };
+
+ static void intel_init_quirks(struct drm_device *dev)
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-g725.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-g725.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,25 @@
+From: Jani Nikula <jani.nikula at intel.com>
+Date: Tue, 22 Jan 2013 10:50:34 +0000
+Subject: drm/i915: add quirk to invert brightness on eMachines G725
+
+commit 1ffff60320879830e469e26062c18f75236822ba upstream.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59628
+Reported-by: Roland Gruber <post at rolandgruber.de>
+Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+---
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 7725446..44f9d8f 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8599,6 +8599,9 @@ static struct intel_quirk intel_quirks[] = {
+
+ /* Acer Aspire 5734Z must invert backlight brightness */
+ { 0x2a42, 0x1025, 0x0459, quirk_invert_brightness },
++
++ /* Acer/eMachines G725 */
++ { 0x2a42, 0x1025, 0x0210, quirk_invert_brightness },
+ };
+
+ static void intel_init_quirks(struct drm_device *dev)
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-packard-bell-ncl20.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-packard-bell-ncl20.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,25 @@
+From: Jani Nikula <jani.nikula at intel.com>
+Date: Tue, 22 Jan 2013 10:50:36 +0000
+Subject: drm/i915: add quirk to invert brightness on Packard Bell NCL20
+
+commit 5559ecadad5a73b27f863e92f4b4f369501dce6f upstream.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44156
+Reported-by: Alan Zimmerman <alan.zimm at gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+---
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 8575a62..7262786 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8605,6 +8605,9 @@ static struct intel_quirk intel_quirks[] = {
+
+ /* Acer/eMachines e725 */
+ { 0x2a42, 0x1025, 0x0212, quirk_invert_brightness },
++
++ /* Acer/Packard Bell NCL20 */
++ { 0x2a42, 0x1025, 0x034b, quirk_invert_brightness },
+ };
+
+ static void intel_init_quirks(struct drm_device *dev)
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk_invert_brightness-for-ncr-machine.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-add-quirk_invert_brightness-for-ncr-machine.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,77 @@
+From: Egbert Eich <eich at suse.de>
+Date: Sun, 14 Oct 2012 15:46:38 +0200
+Subject: DRM/i915: Add QUIRK_INVERT_BRIGHTNESS for NCR machines.
+
+commit 5f85f176c2f1c9d2a23f60ca0b99e4d0aa5a26a7 upstream.
+
+NCR machines with LVDS panels using Intel chipsets need to have the
+QUIRK_INVERT_BRIGHTNESS bit set.
+Unfortunately NCR doesn't set a meaningful subvendor/subdevice ID,
+therefore we add a DMI dependent quirk list.
+
+Signed-off-by: Egbert Eich <eich at suse.de>
+[danvet: fixup whitespace fail.]
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+[bwh: Backported to 3.2:
+ - Adjust context
+ - Add #include <linux/dmi.h>]
+---
+ drivers/gpu/drm/i915/intel_display.c | 32 ++++++++++++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -25,6 +25,7 @@
+ */
+
+ #include <linux/cpufreq.h>
++#include <linux/dmi.h>
+ #include <linux/module.h>
+ #include <linux/input.h>
+ #include <linux/i2c.h>
+@@ -9172,6 +9173,34 @@ struct intel_quirk {
+ void (*hook)(struct drm_device *dev);
+ };
+
++/* For systems that don't have a meaningful PCI subdevice/subvendor ID */
++struct intel_dmi_quirk {
++ void (*hook)(struct drm_device *dev);
++ const struct dmi_system_id (*dmi_id_list)[];
++};
++
++static int intel_dmi_reverse_brightness(const struct dmi_system_id *id)
++{
++ DRM_INFO("Backlight polarity reversed on %s\n", id->ident);
++ return 1;
++}
++
++static const struct intel_dmi_quirk intel_dmi_quirks[] = {
++ {
++ .dmi_id_list = &(const struct dmi_system_id[]) {
++ {
++ .callback = intel_dmi_reverse_brightness,
++ .ident = "NCR Corporation",
++ .matches = {DMI_MATCH(DMI_SYS_VENDOR, "NCR Corporation"),
++ DMI_MATCH(DMI_PRODUCT_NAME, ""),
++ },
++ },
++ { } /* terminating entry */
++ },
++ .hook = quirk_invert_brightness,
++ },
++};
++
+ struct intel_quirk intel_quirks[] = {
+ /* HP Mini needs pipe A force quirk (LP: #322104) */
+ { 0x27ae, 0x103c, 0x361a, quirk_pipea_force },
+@@ -9217,6 +9246,10 @@ static void intel_init_quirks(struct drm
+ q->subsystem_device == PCI_ANY_ID))
+ q->hook(dev);
+ }
++ for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
++ if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
++ intel_dmi_quirks[i].hook(dev);
++ }
+ }
+
+ /* Disable the VGA plane that we never use */
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-acer-aspire-5734z.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-acer-aspire-5734z.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,41 @@
+From: Carsten Emde <C.Emde at osadl.org>
+Date: Thu, 15 Mar 2012 15:56:27 +0100
+Subject: drm/i915: panel: invert brightness acer aspire 5734z
+
+commit 5a15ab5b93e4a3ebcd4fa6c76cf646a45e9cf806 upstream.
+
+Mark the Acer Aspire 5734Z that this machines requires the module to
+invert the panel backlight brightness value after reading from and prior
+to writing to the PCI configuration space.
+
+Signed-off-by: Carsten Emde <C.Emde at osadl.org>
+Acked-by: Chris Wilson <chris at chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+---
+ drivers/gpu/drm/i915/intel_display.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 92208f8..683002fb 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -9021,7 +9021,8 @@ static void quirk_ssc_force_disable(struct drm_device *dev)
+ }
+
+ /*
+- * A machine may need to invert the panel backlight brightness value
++ * A machine (e.g. Acer Aspire 5734Z) may need to invert the panel backlight
++ * brightness value
+ */
+ static void quirk_invert_brightness(struct drm_device *dev)
+ {
+@@ -9061,6 +9062,9 @@ struct intel_quirk intel_quirks[] = {
+
+ /* Sony Vaio Y cannot use SSC on LVDS */
+ { 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable },
++
++ /* Acer Aspire 5734Z must invert backlight brightness */
++ { 0x2a42, 0x1025, 0x0459, quirk_invert_brightness },
+ };
+
+ static void intel_init_quirks(struct drm_device *dev)
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-via-parameter.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-via-parameter.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,72 @@
+From: Carsten Emde <C.Emde at osadl.org>
+Date: Thu, 15 Mar 2012 15:56:25 +0100
+Subject: drm/i915: panel: invert brightness via parameter
+
+commit 7bd90909bbf9ce7c40e1da3d72b97b93839c188a upstream.
+
+Following the documentation of the Legacy Backlight Brightness (LBB)
+Register in the configuration space of some Intel PCI graphics adapters,
+setting the LBB register with the value 0x0 causes the backlight to be
+turned off, and 0xFF causes the backlight to be set to 100% intensity
+(http://download.intel.com/embedded/processors/Whitepaper/324567.pdf).
+The Acer Aspire 5734Z, however, turns the backlight off at 0xFF and sets
+it to maximum intensity at 0. In consequence, the screen of this systems
+becomes dark at an early boot stage which makes it unusable. The same
+inversion applies to the BLC_PWM_CTL I915 register. This problem was
+introduced in kernel version 2.6.38 when the PCI device of this system
+was first supported by the i915 KMS module.
+
+This patch adds a parameter to the i915 module to enable inversion of
+the brightness variable (i915.invert_brightness).
+
+Signed-off-by: Carsten Emde <C.Emde at osadl.org>
+Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+---
+--- a/drivers/gpu/drm/i915/intel_panel.c
++++ b/drivers/gpu/drm/i915/intel_panel.c
+@@ -28,6 +28,7 @@
+ * Chris Wilson <chris at chris-wilson.co.uk>
+ */
+
++#include <linux/moduleparam.h>
+ #include "intel_drv.h"
+
+ #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
+@@ -189,6 +190,20 @@ u32 intel_panel_get_max_backlight(struct
+ return max;
+ }
+
++static bool i915_panel_invert_brightness;
++MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness, please "
++ "report PCI device ID, subsystem vendor and subsystem device ID "
++ "to dri-devel at lists.freedesktop.org, if your machine needs it. "
++ "It will then be included in an upcoming module version.");
++module_param_named(invert_brightness, i915_panel_invert_brightness, bool, 0600);
++static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
++{
++ if (i915_panel_invert_brightness)
++ return intel_panel_get_max_backlight(dev) - val;
++
++ return val;
++}
++
+ u32 intel_panel_get_backlight(struct drm_device *dev)
+ {
+ struct drm_i915_private *dev_priv = dev->dev_private;
+@@ -209,6 +224,7 @@ u32 intel_panel_get_backlight(struct drm
+ }
+ }
+
++ val = intel_panel_compute_brightness(dev, val);
+ DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
+ return val;
+ }
+@@ -226,6 +242,7 @@ static void intel_panel_actually_set_bac
+ u32 tmp;
+
+ DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
++ level = intel_panel_compute_brightness(dev, level);
+
+ if (HAS_PCH_SPLIT(dev))
+ return intel_pch_panel_set_backlight(dev, level);
Added: dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-via-quirk.patch
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ dists/sid/linux/debian/patches/bugfix/x86/drm-i915-panel-invert-brightness-via-quirk.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -0,0 +1,70 @@
+From: Carsten Emde <C.Emde at osadl.org>
+Date: Thu, 15 Mar 2012 15:56:26 +0100
+Subject: drm/i915: panel: invert brightness via quirk
+
+commit 4dca20efb1a9c2efefc28ad2867e5d6c3f5e1955 upstream.
+
+A machine may need to invert the panel backlight brightness value. This
+patch adds the infrastructure for a quirk to do so.
+
+Signed-off-by: Carsten Emde <C.Emde at osadl.org>
+Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
+---
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -296,6 +296,7 @@ enum intel_pch {
+
+ #define QUIRK_PIPEA_FORCE (1<<0)
+ #define QUIRK_LVDS_SSC_DISABLE (1<<1)
++#define QUIRK_INVERT_BRIGHTNESS (1<<2)
+
+ struct intel_fbdev;
+ struct intel_fbc_work;
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -9160,6 +9160,15 @@ static void quirk_ssc_force_disable(stru
+ dev_priv->quirks |= QUIRK_LVDS_SSC_DISABLE;
+ }
+
++/*
++ * A machine may need to invert the panel backlight brightness value
++ */
++static void quirk_invert_brightness(struct drm_device *dev)
++{
++ struct drm_i915_private *dev_priv = dev->dev_private;
++ dev_priv->quirks |= QUIRK_INVERT_BRIGHTNESS;
++}
++
+ struct intel_quirk {
+ int device;
+ int subsystem_vendor;
+--- a/drivers/gpu/drm/i915/intel_panel.c
++++ b/drivers/gpu/drm/i915/intel_panel.c
+@@ -190,15 +190,22 @@ u32 intel_panel_get_max_backlight(struct
+ return max;
+ }
+
+-static bool i915_panel_invert_brightness;
+-MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness, please "
++static int i915_panel_invert_brightness;
++MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
++ "(-1 force normal, 0 machine defaults, 1 force inversion), please "
+ "report PCI device ID, subsystem vendor and subsystem device ID "
+ "to dri-devel at lists.freedesktop.org, if your machine needs it. "
+ "It will then be included in an upcoming module version.");
+-module_param_named(invert_brightness, i915_panel_invert_brightness, bool, 0600);
++module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
+ static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
+ {
+- if (i915_panel_invert_brightness)
++ struct drm_i915_private *dev_priv = dev->dev_private;
++
++ if (i915_panel_invert_brightness < 0)
++ return val;
++
++ if (i915_panel_invert_brightness > 0 ||
++ dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
+ return intel_panel_get_max_backlight(dev) - val;
+
+ return val;
Modified: dists/sid/linux/debian/patches/features/all/drm/drm-3.4.patch
==============================================================================
--- dists/sid/linux/debian/patches/features/all/drm/drm-3.4.patch Sun Apr 28 19:21:19 2013 (r19985)
+++ dists/sid/linux/debian/patches/features/all/drm/drm-3.4.patch Sun Apr 28 20:25:13 2013 (r19986)
@@ -44099,7 +44099,7 @@
__i915_write(8, b)
__i915_write(16, w)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 012a9d2..45c5cf8 100644
+index 144d37c..45c5cf8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -35,6 +35,7 @@
@@ -44217,7 +44217,12 @@
};
enum no_fbc_reason {
-@@ -278,6 +300,16 @@ enum intel_pch {
+@@ -274,11 +296,20 @@ enum intel_pch {
+
+ #define QUIRK_PIPEA_FORCE (1<<0)
+ #define QUIRK_LVDS_SSC_DISABLE (1<<1)
+-#define QUIRK_INVERT_BRIGHTNESS (1<<2)
+
struct intel_fbdev;
struct intel_fbc_work;
@@ -44234,7 +44239,7 @@
typedef struct drm_i915_private {
struct drm_device *dev;
-@@ -295,11 +327,11 @@ typedef struct drm_i915_private {
+@@ -296,11 +327,11 @@ typedef struct drm_i915_private {
/** gt_lock is also taken in irq contexts. */
struct spinlock gt_lock;
@@ -44251,7 +44256,7 @@
struct pci_dev *bridge_dev;
struct intel_ring_buffer ring[I915_NUM_RINGS];
-@@ -334,7 +366,6 @@ typedef struct drm_i915_private {
+@@ -335,7 +366,6 @@ typedef struct drm_i915_private {
int tex_lru_log_granularity;
int allow_batchbuffer;
@@ -44259,7 +44264,7 @@
unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
int vblank_pipe;
int num_pipe;
-@@ -359,6 +390,7 @@ typedef struct drm_i915_private {
+@@ -360,6 +390,7 @@ typedef struct drm_i915_private {
/* overlay */
struct intel_overlay *overlay;
@@ -44267,7 +44272,7 @@
/* LVDS info */
int backlight_level; /* restore backlight to this value */
-@@ -584,6 +616,9 @@ typedef struct drm_i915_private {
+@@ -585,6 +616,9 @@ typedef struct drm_i915_private {
struct io_mapping *gtt_mapping;
int gtt_mtrr;
@@ -44277,7 +44282,7 @@
struct shrinker inactive_shrinker;
/**
-@@ -749,6 +784,13 @@ typedef struct drm_i915_private {
+@@ -750,6 +784,13 @@ typedef struct drm_i915_private {
struct drm_property *force_audio_property;
} drm_i915_private_t;
@@ -44291,7 +44296,7 @@
enum i915_cache_level {
I915_CACHE_NONE,
I915_CACHE_LLC,
-@@ -841,6 +883,8 @@ struct drm_i915_gem_object {
+@@ -842,6 +883,8 @@ struct drm_i915_gem_object {
unsigned int cache_level:2;
@@ -44300,7 +44305,7 @@
struct page **pages;
/**
-@@ -918,6 +962,9 @@ struct drm_i915_gem_request {
+@@ -919,6 +962,9 @@ struct drm_i915_gem_request {
/** GEM sequence number associated with this request. */
uint32_t seqno;
@@ -44310,7 +44315,7 @@
/** Time at which this request was emitted, in jiffies. */
unsigned long emitted_jiffies;
-@@ -974,8 +1021,11 @@ struct drm_i915_file_private {
+@@ -975,8 +1021,11 @@ struct drm_i915_file_private {
#define HAS_BSD(dev) (INTEL_INFO(dev)->has_bsd_ring)
#define HAS_BLT(dev) (INTEL_INFO(dev)->has_blt_ring)
@@ -44322,7 +44327,7 @@
#define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
#define OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical)
-@@ -1008,6 +1058,27 @@ struct drm_i915_file_private {
+@@ -1009,6 +1058,27 @@ struct drm_i915_file_private {
#include "i915_trace.h"
@@ -44350,7 +44355,7 @@
extern struct drm_ioctl_desc i915_ioctls[];
extern int i915_max_ioctl;
extern unsigned int i915_fbpercrtc __always_unused;
-@@ -1020,6 +1091,7 @@ extern int i915_vbt_sdvo_panel_type __read_mostly;
+@@ -1021,6 +1091,7 @@ extern int i915_vbt_sdvo_panel_type __read_mostly;
extern int i915_enable_rc6 __read_mostly;
extern int i915_enable_fbc __read_mostly;
extern bool i915_enable_hangcheck __read_mostly;
@@ -44358,7 +44363,7 @@
extern int i915_suspend(struct drm_device *dev, pm_message_t state);
extern int i915_resume(struct drm_device *dev);
-@@ -1081,18 +1153,6 @@ extern void i915_destroy_error_state(struct drm_device *dev);
+@@ -1082,18 +1153,6 @@ extern void i915_destroy_error_state(struct drm_device *dev);
#endif
@@ -44377,7 +44382,7 @@
/* i915_gem.c */
int i915_gem_init_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
-@@ -1178,26 +1238,49 @@ int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
+@@ -1179,26 +1238,49 @@ int __must_check i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
struct intel_ring_buffer *pipelined);
int __must_check i915_gem_object_put_fence(struct drm_i915_gem_object *obj);
@@ -44430,7 +44435,7 @@
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int __must_check
i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
-@@ -1224,6 +1307,14 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
+@@ -1225,6 +1307,14 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
enum i915_cache_level cache_level);
/* i915_gem_gtt.c */
@@ -44445,7 +44450,7 @@
void i915_gem_restore_gtt_mappings(struct drm_device *dev);
int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj);
void i915_gem_gtt_rebind_object(struct drm_i915_gem_object *obj,
-@@ -1305,7 +1396,6 @@ static inline void intel_unregister_dsm_handler(void) { return; }
+@@ -1306,7 +1396,6 @@ static inline void intel_unregister_dsm_handler(void) { return; }
#endif /* CONFIG_ACPI */
/* modesetting */
@@ -44453,7 +44458,7 @@
extern void intel_modeset_init(struct drm_device *dev);
extern void intel_modeset_gem_init(struct drm_device *dev);
extern void intel_modeset_cleanup(struct drm_device *dev);
-@@ -1363,14 +1453,7 @@ extern void intel_display_print_error_state(struct seq_file *m,
+@@ -1364,14 +1453,7 @@ extern void intel_display_print_error_state(struct seq_file *m,
*/
void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
@@ -45943,7 +45948,7 @@
args->buffer_count, ret);
}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 6042c5e..a135c61 100644
+index 6042c5e..99a7855 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -29,6 +29,270 @@
@@ -45993,7 +45998,7 @@
+ /* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
+ * entries. For aliasing ppgtt support we just steal them at the end for
+ * now. */
-+ first_pd_entry_in_global_pt = 512*1024 - I915_PPGTT_PD_ENTRIES;
++ first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
+
+ ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
+ if (!ppgtt)
@@ -47709,10 +47714,18 @@
drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 17961df..84867a8 100644
+index 897ca06..84867a8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -75,7 +75,7 @@ struct intel_limit {
+@@ -25,7 +25,6 @@
+ */
+
+ #include <linux/cpufreq.h>
+-#include <linux/dmi.h>
+ #include <linux/module.h>
+ #include <linux/input.h>
+ #include <linux/i2c.h>
+@@ -76,7 +75,7 @@ struct intel_limit {
intel_range_t dot, vco, n, m, m1, m2, p, p1;
intel_p2_t p2;
bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
@@ -47721,7 +47734,7 @@
};
/* FDI */
-@@ -83,17 +83,21 @@ struct intel_limit {
+@@ -84,17 +83,21 @@ struct intel_limit {
static bool
intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -47747,7 +47760,7 @@
static inline u32 /* units of 100MHz */
intel_fdi_link_freq(struct drm_device *dev)
-@@ -534,7 +538,8 @@ static bool intel_PLL_is_valid(struct drm_device *dev,
+@@ -535,7 +538,8 @@ static bool intel_PLL_is_valid(struct drm_device *dev,
static bool
intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -47757,7 +47770,7 @@
{
struct drm_device *dev = crtc->dev;
-@@ -580,6 +585,9 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+@@ -581,6 +585,9 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
if (!intel_PLL_is_valid(dev, limit,
&clock))
continue;
@@ -47767,7 +47780,7 @@
this_err = abs(clock.dot - target);
if (this_err < err) {
-@@ -596,7 +604,8 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+@@ -597,7 +604,8 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
static bool
intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -47777,7 +47790,7 @@
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -643,6 +652,9 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+@@ -644,6 +652,9 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
if (!intel_PLL_is_valid(dev, limit,
&clock))
continue;
@@ -47787,7 +47800,7 @@
this_err = abs(clock.dot - target);
if (this_err < err_most) {
-@@ -660,7 +672,8 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
+@@ -661,7 +672,8 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
static bool
intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -47797,7 +47810,7 @@
{
struct drm_device *dev = crtc->dev;
intel_clock_t clock;
-@@ -686,7 +699,8 @@ intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
+@@ -687,7 +699,8 @@ intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
/* DisplayPort has only two frequencies, 162MHz and 270MHz */
static bool
intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -47807,7 +47820,7 @@
{
intel_clock_t clock;
if (target < 200000) {
-@@ -933,13 +947,17 @@ static void assert_panel_unlocked(struct drm_i915_private *dev_priv,
+@@ -934,13 +947,17 @@ static void assert_panel_unlocked(struct drm_i915_private *dev_priv,
pipe_name(pipe));
}
@@ -47827,7 +47840,7 @@
reg = PIPECONF(pipe);
val = I915_READ(reg);
cur_state = !!(val & PIPECONF_ENABLE);
-@@ -947,22 +965,25 @@ static void assert_pipe(struct drm_i915_private *dev_priv,
+@@ -948,22 +965,25 @@ static void assert_pipe(struct drm_i915_private *dev_priv,
"pipe %c assertion failure (expected %s, current %s)\n",
pipe_name(pipe), state_string(state), state_string(cur_state));
}
@@ -47860,7 +47873,7 @@
static void assert_planes_disabled(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
-@@ -971,8 +992,14 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
+@@ -972,8 +992,14 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
int cur_pipe;
/* Planes are fixed to pipes on ILK+ */
@@ -47876,7 +47889,7 @@
/* Need to check both planes against the pipe */
for (i = 0; i < 2; i++) {
-@@ -1224,7 +1251,8 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
+@@ -1225,7 +1251,8 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
int reg;
@@ -47886,7 +47899,7 @@
if (pipe > 1)
return;
-@@ -1235,6 +1263,15 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
+@@ -1236,6 +1263,15 @@ static void intel_disable_pch_pll(struct drm_i915_private *dev_priv,
/* Make sure transcoder isn't still depending on us */
assert_transcoder_disabled(dev_priv, pipe);
@@ -47902,7 +47915,7 @@
reg = PCH_DPLL(pipe);
val = I915_READ(reg);
val &= ~DPLL_VCO_ENABLE;
-@@ -1247,7 +1284,8 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
+@@ -1248,7 +1284,8 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
int reg;
@@ -47912,7 +47925,7 @@
/* PCH only available on ILK+ */
BUG_ON(dev_priv->info->gen < 5);
-@@ -1261,6 +1299,7 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
+@@ -1262,6 +1299,7 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
reg = TRANSCONF(pipe);
val = I915_READ(reg);
@@ -47920,7 +47933,7 @@
if (HAS_PCH_IBX(dev_priv->dev)) {
/*
-@@ -1268,8 +1307,19 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
+@@ -1269,8 +1307,19 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
* that in pipeconf reg.
*/
val &= ~PIPE_BPC_MASK;
@@ -47941,7 +47954,7 @@
I915_WRITE(reg, val | TRANS_ENABLE);
if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100))
DRM_ERROR("failed to enable transcoder %d\n", pipe);
-@@ -1529,8 +1579,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
+@@ -1530,8 +1579,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
u32 fbc_ctl, fbc_ctl2;
cfb_pitch = dev_priv->cfb_size / FBC_LL_SIZE;
@@ -47952,7 +47965,7 @@
/* FBC_CTL wants 64B units */
cfb_pitch = (cfb_pitch / 64) - 1;
-@@ -2022,6 +2072,8 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
+@@ -2023,6 +2072,8 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
ret = i915_gem_object_get_fence(obj, pipelined);
if (ret)
goto err_unpin;
@@ -47961,7 +47974,7 @@
}
dev_priv->mm.interruptible = true;
-@@ -2034,6 +2086,12 @@ err_interruptible:
+@@ -2035,6 +2086,12 @@ err_interruptible:
return ret;
}
@@ -47974,7 +47987,7 @@
static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
int x, int y)
{
-@@ -2091,11 +2149,11 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
+@@ -2092,11 +2149,11 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
I915_WRITE(reg, dspcntr);
Start = obj->gtt_offset;
@@ -47989,7 +48002,7 @@
if (INTEL_INFO(dev)->gen >= 4) {
I915_WRITE(DSPSURF(plane), Start);
I915_WRITE(DSPTILEOFF(plane), (y << 16) | x);
-@@ -2172,11 +2230,11 @@ static int ironlake_update_plane(struct drm_crtc *crtc,
+@@ -2173,11 +2230,11 @@ static int ironlake_update_plane(struct drm_crtc *crtc,
I915_WRITE(reg, dspcntr);
Start = obj->gtt_offset;
@@ -48004,7 +48017,7 @@
I915_WRITE(DSPSURF(plane), Start);
I915_WRITE(DSPTILEOFF(plane), (y << 16) | x);
I915_WRITE(DSPADDR(plane), Offset);
-@@ -2275,7 +2333,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
+@@ -2276,7 +2333,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y,
LEAVE_ATOMIC_MODE_SET);
if (ret) {
@@ -48013,7 +48026,7 @@
mutex_unlock(&dev->struct_mutex);
DRM_ERROR("failed to update base address\n");
return ret;
-@@ -2283,7 +2341,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
+@@ -2284,7 +2341,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
if (old_fb) {
intel_wait_for_vblank(dev, intel_crtc->pipe);
@@ -48022,7 +48035,7 @@
}
mutex_unlock(&dev->struct_mutex);
-@@ -2427,9 +2485,11 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
+@@ -2428,9 +2485,11 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
udelay(150);
/* Ironlake workaround, enable clock pointer after FDI enable*/
@@ -48037,7 +48050,7 @@
reg = FDI_RX_IIR(pipe);
for (tries = 0; tries < 5; tries++) {
-@@ -2942,6 +3002,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
+@@ -2943,6 +3002,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
I915_WRITE(TRANS_VTOTAL(pipe), I915_READ(VTOTAL(pipe)));
I915_WRITE(TRANS_VBLANK(pipe), I915_READ(VBLANK(pipe)));
I915_WRITE(TRANS_VSYNC(pipe), I915_READ(VSYNC(pipe)));
@@ -48045,7 +48058,7 @@
intel_fdi_normal_train(crtc);
-@@ -3339,10 +3400,12 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
+@@ -3340,10 +3400,12 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
@@ -48059,7 +48072,7 @@
mutex_unlock(&dev->struct_mutex);
}
}
-@@ -3416,10 +3479,10 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
+@@ -3417,10 +3479,10 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
return false;
}
@@ -48074,7 +48087,7 @@
drm_mode_set_crtcinfo(adjusted_mode, 0);
return true;
-@@ -4535,10 +4598,11 @@ static void ironlake_update_wm(struct drm_device *dev)
+@@ -4536,10 +4598,11 @@ static void ironlake_update_wm(struct drm_device *dev)
*/
}
@@ -48087,7 +48100,7 @@
int fbc_wm, plane_wm, cursor_wm;
unsigned int enabled;
-@@ -4547,8 +4611,10 @@ static void sandybridge_update_wm(struct drm_device *dev)
+@@ -4548,8 +4611,10 @@ static void sandybridge_update_wm(struct drm_device *dev)
&sandybridge_display_wm_info, latency,
&sandybridge_cursor_wm_info, latency,
&plane_wm, &cursor_wm)) {
@@ -48100,7 +48113,7 @@
DRM_DEBUG_KMS("FIFO watermarks For pipe A -"
" plane %d, " "cursor: %d\n",
plane_wm, cursor_wm);
-@@ -4559,8 +4625,10 @@ static void sandybridge_update_wm(struct drm_device *dev)
+@@ -4560,8 +4625,10 @@ static void sandybridge_update_wm(struct drm_device *dev)
&sandybridge_display_wm_info, latency,
&sandybridge_cursor_wm_info, latency,
&plane_wm, &cursor_wm)) {
@@ -48113,7 +48126,7 @@
DRM_DEBUG_KMS("FIFO watermarks For pipe B -"
" plane %d, cursor: %d\n",
plane_wm, cursor_wm);
-@@ -4573,8 +4641,10 @@ static void sandybridge_update_wm(struct drm_device *dev)
+@@ -4574,8 +4641,10 @@ static void sandybridge_update_wm(struct drm_device *dev)
&sandybridge_display_wm_info, latency,
&sandybridge_cursor_wm_info, latency,
&plane_wm, &cursor_wm)) {
@@ -48126,7 +48139,7 @@
DRM_DEBUG_KMS("FIFO watermarks For pipe C -"
" plane %d, cursor: %d\n",
plane_wm, cursor_wm);
-@@ -4595,7 +4665,8 @@ static void sandybridge_update_wm(struct drm_device *dev)
+@@ -4596,7 +4665,8 @@ static void sandybridge_update_wm(struct drm_device *dev)
I915_WRITE(WM2_LP_ILK, 0);
I915_WRITE(WM1_LP_ILK, 0);
@@ -48136,7 +48149,7 @@
return;
enabled = ffs(enabled) - 1;
-@@ -4645,6 +4716,161 @@ static void sandybridge_update_wm(struct drm_device *dev)
+@@ -4646,6 +4716,161 @@ static void sandybridge_update_wm(struct drm_device *dev)
cursor_wm);
}
@@ -48298,7 +48311,7 @@
/**
* intel_update_watermarks - update FIFO watermark values based on current modes
*
-@@ -4685,6 +4911,16 @@ static void intel_update_watermarks(struct drm_device *dev)
+@@ -4686,6 +4911,16 @@ static void intel_update_watermarks(struct drm_device *dev)
dev_priv->display.update_wm(dev);
}
@@ -48315,7 +48328,7 @@
static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
{
if (i915_panel_use_ssc >= 0)
-@@ -4832,6 +5068,82 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
+@@ -4833,6 +5068,82 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
return display_bpc != bpc;
}
@@ -48398,7 +48411,7 @@
static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode,
-@@ -4845,7 +5157,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -4846,7 +5157,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
int plane = intel_crtc->plane;
int refclk, num_connectors = 0;
intel_clock_t clock, reduced_clock;
@@ -48407,7 +48420,7 @@
bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;
bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
struct drm_mode_config *mode_config = &dev->mode_config;
-@@ -4886,15 +5198,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -4887,15 +5198,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
num_connectors++;
}
@@ -48424,7 +48437,7 @@
/*
* Returns a set of divisors for the desired target clock with the given
-@@ -4902,7 +5206,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -4903,7 +5206,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
* reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
*/
limit = intel_limit(crtc, refclk);
@@ -48434,7 +48447,7 @@
if (!ok) {
DRM_ERROR("Couldn't find PLL settings for mode!\n");
return -EINVAL;
-@@ -4912,53 +5217,24 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -4913,53 +5217,24 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
intel_crtc_update_cursor(crtc, true);
if (is_lvds && dev_priv->lvds_downclock_avail) {
@@ -48500,7 +48513,7 @@
dpll = DPLL_VGA_MODE_DIS;
-@@ -5032,8 +5308,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5033,8 +5308,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
/* Set up the display plane register */
dspcntr = DISPPLANE_GAMMA_ENABLE;
@@ -48509,7 +48522,7 @@
if (pipe == 0)
dspcntr &= ~DISPPLANE_SEL_PIPE_MASK;
else
-@@ -5068,7 +5342,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5069,7 +5342,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
drm_mode_debug_printmodeline(mode);
@@ -48517,7 +48530,7 @@
I915_WRITE(DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
POSTING_READ(DPLL(pipe));
-@@ -5155,33 +5428,32 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5156,33 +5428,32 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
I915_WRITE(DPLL(pipe), dpll);
}
@@ -48566,7 +48579,7 @@
I915_WRITE(HTOTAL(pipe),
(adjusted_mode->crtc_hdisplay - 1) |
-@@ -5298,7 +5570,8 @@ void ironlake_init_pch_refclk(struct drm_device *dev)
+@@ -5299,7 +5570,8 @@ void ironlake_init_pch_refclk(struct drm_device *dev)
if (intel_panel_use_ssc(dev_priv) && can_ssc) {
DRM_DEBUG_KMS("Using SSC on panel\n");
temp |= DREF_SSC1_ENABLE;
@@ -48576,7 +48589,7 @@
/* Get SSC going before enabling the outputs */
I915_WRITE(PCH_DREF_CONTROL, temp);
-@@ -5447,7 +5720,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5448,7 +5720,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
* reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
*/
limit = intel_limit(crtc, refclk);
@@ -48586,7 +48599,7 @@
if (!ok) {
DRM_ERROR("Couldn't find PLL settings for mode!\n");
return -EINVAL;
-@@ -5457,21 +5731,17 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5458,21 +5731,17 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
intel_crtc_update_cursor(crtc, true);
if (is_lvds && dev_priv->lvds_downclock_avail) {
@@ -48615,7 +48628,7 @@
}
/* SDVO TV has fixed PLL values depend on its clock range,
this mirrors vbios setting. */
-@@ -5766,17 +6036,19 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5767,17 +6036,19 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
}
}
@@ -48642,7 +48655,7 @@
I915_WRITE(HTOTAL(pipe),
(adjusted_mode->crtc_hdisplay - 1) |
-@@ -5819,12 +6091,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5820,12 +6091,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
intel_wait_for_vblank(dev, pipe);
@@ -48655,7 +48668,7 @@
I915_WRITE(DSPCNTR(plane), dspcntr);
POSTING_READ(DSPCNTR(plane));
-@@ -5851,14 +6117,45 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
+@@ -5852,14 +6117,45 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode,
x, y, old_fb);
@@ -48703,7 +48716,7 @@
static void g4x_write_eld(struct drm_connector *connector,
struct drm_crtc *crtc)
{
-@@ -5875,6 +6172,12 @@ static void g4x_write_eld(struct drm_connector *connector,
+@@ -5876,6 +6172,12 @@ static void g4x_write_eld(struct drm_connector *connector,
else
eldv = G4X_ELDV_DEVCTG;
@@ -48716,7 +48729,7 @@
i = I915_READ(G4X_AUD_CNTL_ST);
i &= ~(eldv | G4X_ELD_ADDR);
len = (i >> 9) & 0x1f; /* ELD buffer size */
-@@ -5902,22 +6205,26 @@ static void ironlake_write_eld(struct drm_connector *connector,
+@@ -5903,22 +6205,26 @@ static void ironlake_write_eld(struct drm_connector *connector,
uint32_t i;
int len;
int hdmiw_hdmiedid;
@@ -48749,7 +48762,7 @@
DRM_DEBUG_DRIVER("ELD on pipe %c\n", pipe_name(i));
-@@ -5926,14 +6233,27 @@ static void ironlake_write_eld(struct drm_connector *connector,
+@@ -5927,14 +6233,27 @@ static void ironlake_write_eld(struct drm_connector *connector,
if (!i) {
DRM_DEBUG_DRIVER("Audio directed to unknown port\n");
/* operate blindly on all ports */
@@ -48781,7 +48794,7 @@
i = I915_READ(aud_cntrl_st2);
i &= ~eldv;
I915_WRITE(aud_cntrl_st2, i);
-@@ -5941,13 +6261,8 @@ static void ironlake_write_eld(struct drm_connector *connector,
+@@ -5942,13 +6261,8 @@ static void ironlake_write_eld(struct drm_connector *connector,
if (!eld[0])
return;
@@ -48796,7 +48809,7 @@
I915_WRITE(aud_cntl_st, i);
len = min_t(uint8_t, eld[2], 21); /* 84 bytes of hw ELD buffer */
-@@ -6327,7 +6642,7 @@ static struct drm_display_mode load_detect_mode = {
+@@ -6328,7 +6642,7 @@ static struct drm_display_mode load_detect_mode = {
static struct drm_framebuffer *
intel_framebuffer_create(struct drm_device *dev,
@@ -48805,7 +48818,7 @@
struct drm_i915_gem_object *obj)
{
struct intel_framebuffer *intel_fb;
-@@ -6369,7 +6684,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev,
+@@ -6370,7 +6684,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev,
int depth, int bpp)
{
struct drm_i915_gem_object *obj;
@@ -48814,7 +48827,7 @@
obj = i915_gem_alloc_object(dev,
intel_framebuffer_size_for_mode(mode, bpp));
-@@ -6378,9 +6693,9 @@ intel_framebuffer_create_for_mode(struct drm_device *dev,
+@@ -6379,9 +6693,9 @@ intel_framebuffer_create_for_mode(struct drm_device *dev,
mode_cmd.width = mode->hdisplay;
mode_cmd.height = mode->vdisplay;
@@ -48827,7 +48840,7 @@
return intel_framebuffer_create(dev, &mode_cmd, obj);
}
-@@ -6401,11 +6716,11 @@ mode_fits_in_fbdev(struct drm_device *dev,
+@@ -6402,11 +6716,11 @@ mode_fits_in_fbdev(struct drm_device *dev,
return NULL;
fb = &dev_priv->fbdev->ifb.base;
@@ -48842,7 +48855,7 @@
return NULL;
return fb;
-@@ -6737,9 +7052,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
+@@ -6738,9 +7052,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) {
DRM_DEBUG_DRIVER("upclocking LVDS\n");
@@ -48853,7 +48866,7 @@
dpll &= ~DISPLAY_RATE_SELECT_FPA1;
I915_WRITE(dpll_reg, dpll);
-@@ -6748,9 +7061,6 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
+@@ -6749,9 +7061,6 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
dpll = I915_READ(dpll_reg);
if (dpll & DISPLAY_RATE_SELECT_FPA1)
DRM_DEBUG_DRIVER("failed to upclock LVDS!\n");
@@ -48863,7 +48876,7 @@
}
/* Schedule downclock */
-@@ -6763,9 +7073,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
+@@ -6764,9 +7073,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
drm_i915_private_t *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -48873,7 +48886,7 @@
if (HAS_PCH_SPLIT(dev))
return;
-@@ -6778,23 +7085,22 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
+@@ -6779,23 +7085,22 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
* the manual case.
*/
if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
@@ -48903,7 +48916,7 @@
}
/**
-@@ -6907,7 +7213,7 @@ static void intel_unpin_work_fn(struct work_struct *__work)
+@@ -6908,7 +7213,7 @@ static void intel_unpin_work_fn(struct work_struct *__work)
container_of(__work, struct intel_unpin_work, work);
mutex_lock(&work->dev->struct_mutex);
@@ -48912,7 +48925,7 @@
drm_gem_object_unreference(&work->pending_flip_obj->base);
drm_gem_object_unreference(&work->old_fb_obj->base);
-@@ -6935,18 +7241,11 @@ static void do_intel_finish_page_flip(struct drm_device *dev,
+@@ -6936,18 +7241,11 @@ static void do_intel_finish_page_flip(struct drm_device *dev,
spin_lock_irqsave(&dev->event_lock, flags);
work = intel_crtc->unpin_work;
@@ -48932,7 +48945,7 @@
intel_crtc->unpin_work = NULL;
if (work->event) {
-@@ -7018,25 +7317,16 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
+@@ -7019,25 +7317,16 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
to_intel_crtc(dev_priv->plane_to_crtc_mapping[plane]);
unsigned long flags;
@@ -48964,7 +48977,7 @@
static int intel_gen2_queue_flip(struct drm_device *dev,
struct drm_crtc *crtc,
struct drm_framebuffer *fb,
-@@ -7053,7 +7343,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
+@@ -7054,7 +7343,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
goto err;
/* Offset into the new buffer for cases of shared fbs between CRTCs */
@@ -48973,7 +48986,7 @@
ret = BEGIN_LP_RING(6);
if (ret)
-@@ -7070,16 +7360,14 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
+@@ -7071,16 +7360,14 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
OUT_RING(MI_NOOP);
OUT_RING(MI_DISPLAY_FLIP |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
@@ -48993,7 +49006,7 @@
err:
return ret;
}
-@@ -7100,7 +7388,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
+@@ -7101,7 +7388,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
goto err;
/* Offset into the new buffer for cases of shared fbs between CRTCs */
@@ -49002,7 +49015,7 @@
ret = BEGIN_LP_RING(6);
if (ret)
-@@ -7114,16 +7402,15 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
+@@ -7115,16 +7402,15 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
OUT_RING(MI_NOOP);
OUT_RING(MI_DISPLAY_FLIP_I915 |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
@@ -49021,7 +49034,7 @@
err:
return ret;
}
-@@ -7152,7 +7439,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
+@@ -7153,7 +7439,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
*/
OUT_RING(MI_DISPLAY_FLIP |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
@@ -49030,7 +49043,7 @@
OUT_RING(obj->gtt_offset | obj->tiling_mode);
/* XXX Enabling the panel-fitter across page-flip is so far
-@@ -7162,13 +7449,11 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
+@@ -7163,13 +7449,11 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
pf = 0;
pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
OUT_RING(pf | pipesrc);
@@ -49045,7 +49058,7 @@
err:
return ret;
}
-@@ -7193,19 +7478,23 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
+@@ -7194,19 +7478,23 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
OUT_RING(MI_DISPLAY_FLIP |
MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
@@ -49074,7 +49087,7 @@
err:
return ret;
}
-@@ -7252,16 +7541,14 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
+@@ -7253,16 +7541,14 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
goto err_unpin;
intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);
@@ -49093,7 +49106,7 @@
err:
return ret;
}
-@@ -7556,10 +7843,9 @@ static void intel_setup_outputs(struct drm_device *dev)
+@@ -7557,10 +7843,9 @@ static void intel_setup_outputs(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_encoder *encoder;
bool dpd_is_edp = false;
@@ -49106,7 +49119,7 @@
if (!has_lvds && !HAS_PCH_SPLIT(dev)) {
/* disable the panel fitter on everything but LVDS */
I915_WRITE(PFIT_CONTROL, 0);
-@@ -7688,7 +7974,7 @@ static const struct drm_framebuffer_funcs intel_fb_funcs = {
+@@ -7689,7 +7974,7 @@ static const struct drm_framebuffer_funcs intel_fb_funcs = {
int intel_framebuffer_init(struct drm_device *dev,
struct intel_framebuffer *intel_fb,
@@ -49115,7 +49128,7 @@
struct drm_i915_gem_object *obj)
{
int ret;
-@@ -7696,21 +7982,27 @@ int intel_framebuffer_init(struct drm_device *dev,
+@@ -7697,21 +7982,27 @@ int intel_framebuffer_init(struct drm_device *dev,
if (obj->tiling_mode == I915_TILING_Y)
return -EINVAL;
@@ -49153,7 +49166,7 @@
return -EINVAL;
}
-@@ -7728,11 +8020,12 @@ int intel_framebuffer_init(struct drm_device *dev,
+@@ -7729,11 +8020,12 @@ int intel_framebuffer_init(struct drm_device *dev,
static struct drm_framebuffer *
intel_user_framebuffer_create(struct drm_device *dev,
struct drm_file *filp,
@@ -49168,7 +49181,7 @@
if (&obj->base == NULL)
return ERR_PTR(-ENOENT);
-@@ -8001,7 +8294,7 @@ void intel_init_emon(struct drm_device *dev)
+@@ -8002,7 +8294,7 @@ void intel_init_emon(struct drm_device *dev)
dev_priv->corr = (lcfuse & LCFUSE_HIV_MASK);
}
@@ -49177,7 +49190,7 @@
{
/*
* Respect the kernel parameter if it is set
-@@ -8019,11 +8312,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
+@@ -8020,11 +8312,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
* Disable rc6 on Sandybridge
*/
if (INTEL_INFO(dev)->gen == 6) {
@@ -49193,7 +49206,7 @@
}
void gen6_enable_rps(struct drm_i915_private *dev_priv)
-@@ -8031,7 +8324,9 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
+@@ -8032,7 +8324,9 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
u32 pcu_mbox, rc6_mask = 0;
@@ -49203,7 +49216,7 @@
int i;
/* Here begins a magic sequence of register writes to enable
-@@ -8042,6 +8337,13 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
+@@ -8043,6 +8337,13 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
*/
I915_WRITE(GEN6_RC_STATE, 0);
mutex_lock(&dev_priv->dev->struct_mutex);
@@ -49217,7 +49230,7 @@
gen6_gt_force_wake_get(dev_priv);
/* disable the counters and set deterministic thresholds */
-@@ -8062,9 +8364,20 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
+@@ -8063,9 +8364,20 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
I915_WRITE(GEN6_RC6p_THRESHOLD, 150000);
I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
@@ -49241,7 +49254,7 @@
I915_WRITE(GEN6_RC_CONTROL,
rc6_mask |
-@@ -8292,6 +8605,10 @@ static void gen6_init_clock_gating(struct drm_device *dev)
+@@ -8293,6 +8605,10 @@ static void gen6_init_clock_gating(struct drm_device *dev)
I915_WRITE(WM2_LP_ILK, 0);
I915_WRITE(WM1_LP_ILK, 0);
@@ -49252,7 +49265,7 @@
/* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock
* gating disable must be set. Failure to set it results in
* flickering pixels due to Z write ordering failures after
-@@ -8370,6 +8687,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
+@@ -8371,6 +8687,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
@@ -49263,7 +49276,7 @@
/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
-@@ -8680,9 +9001,15 @@ static void intel_init_display(struct drm_device *dev)
+@@ -8681,9 +9001,15 @@ static void intel_init_display(struct drm_device *dev)
if (IS_IVYBRIDGE(dev)) {
u32 ecobus;
@@ -49280,7 +49293,7 @@
__gen6_gt_force_wake_mt_put(dev_priv);
mutex_unlock(&dev->struct_mutex);
-@@ -8714,6 +9041,7 @@ static void intel_init_display(struct drm_device *dev)
+@@ -8715,6 +9041,7 @@ static void intel_init_display(struct drm_device *dev)
} else if (IS_GEN6(dev)) {
if (SNB_READ_WM0_LATENCY()) {
dev_priv->display.update_wm = sandybridge_update_wm;
@@ -49288,7 +49301,7 @@
} else {
DRM_DEBUG_KMS("Failed to read display plane latency. "
"Disable CxSR\n");
-@@ -8727,6 +9055,7 @@ static void intel_init_display(struct drm_device *dev)
+@@ -8728,6 +9055,7 @@ static void intel_init_display(struct drm_device *dev)
dev_priv->display.fdi_link_train = ivb_manual_fdi_link_train;
if (SNB_READ_WM0_LATENCY()) {
dev_priv->display.update_wm = sandybridge_update_wm;
@@ -49296,16 +49309,92 @@
} else {
DRM_DEBUG_KMS("Failed to read display plane latency. "
"Disable CxSR\n");
-@@ -8839,8 +9168,6 @@ struct intel_quirk {
+@@ -8832,16 +9160,6 @@ static void quirk_ssc_force_disable(struct drm_device *dev)
+ dev_priv->quirks |= QUIRK_LVDS_SSC_DISABLE;
+ }
+
+-/*
+- * A machine (e.g. Acer Aspire 5734Z) may need to invert the panel backlight
+- * brightness value
+- */
+-static void quirk_invert_brightness(struct drm_device *dev)
+-{
+- struct drm_i915_private *dev_priv = dev->dev_private;
+- dev_priv->quirks |= QUIRK_INVERT_BRIGHTNESS;
+-}
+-
+ struct intel_quirk {
+ int device;
+ int subsystem_vendor;
+@@ -8849,37 +9167,7 @@ struct intel_quirk {
+ void (*hook)(struct drm_device *dev);
};
+-/* For systems that don't have a meaningful PCI subdevice/subvendor ID */
+-struct intel_dmi_quirk {
+- void (*hook)(struct drm_device *dev);
+- const struct dmi_system_id (*dmi_id_list)[];
+-};
+-
+-static int intel_dmi_reverse_brightness(const struct dmi_system_id *id)
+-{
+- DRM_INFO("Backlight polarity reversed on %s\n", id->ident);
+- return 1;
+-}
+-
+-static const struct intel_dmi_quirk intel_dmi_quirks[] = {
+- {
+- .dmi_id_list = &(const struct dmi_system_id[]) {
+- {
+- .callback = intel_dmi_reverse_brightness,
+- .ident = "NCR Corporation",
+- .matches = {DMI_MATCH(DMI_SYS_VENDOR, "NCR Corporation"),
+- DMI_MATCH(DMI_PRODUCT_NAME, ""),
+- },
+- },
+- { } /* terminating entry */
+- },
+- .hook = quirk_invert_brightness,
+- },
+-};
+-
struct intel_quirk intel_quirks[] = {
- /* HP Compaq 2730p needs pipe A force quirk (LP: #291555) */
- { 0x2a42, 0x103c, 0x30eb, quirk_pipea_force },
/* HP Mini needs pipe A force quirk (LP: #322104) */
{ 0x27ae, 0x103c, 0x361a, quirk_pipea_force },
-@@ -8907,33 +9234,19 @@ static void i915_disable_vga(struct drm_device *dev)
+@@ -8904,18 +9192,6 @@ struct intel_quirk intel_quirks[] = {
+
+ /* Sony Vaio Y cannot use SSC on LVDS */
+ { 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable },
+-
+- /* Acer Aspire 5734Z must invert backlight brightness */
+- { 0x2a42, 0x1025, 0x0459, quirk_invert_brightness },
+-
+- /* Acer/eMachines G725 */
+- { 0x2a42, 0x1025, 0x0210, quirk_invert_brightness },
+-
+- /* Acer/eMachines e725 */
+- { 0x2a42, 0x1025, 0x0212, quirk_invert_brightness },
+-
+- /* Acer/Packard Bell NCL20 */
+- { 0x2a42, 0x1025, 0x034b, quirk_invert_brightness },
+ };
+
+ static void intel_init_quirks(struct drm_device *dev)
+@@ -8933,10 +9209,6 @@ static void intel_init_quirks(struct drm_device *dev)
+ q->subsystem_device == PCI_ANY_ID))
+ q->hook(dev);
+ }
+- for (i = 0; i < ARRAY_SIZE(intel_dmi_quirks); i++) {
+- if (dmi_check_system(*intel_dmi_quirks[i].dmi_id_list) != 0)
+- intel_dmi_quirks[i].hook(dev);
+- }
+ }
+
+ /* Disable the VGA plane that we never use */
+@@ -8962,33 +9234,19 @@ static void i915_disable_vga(struct drm_device *dev)
POSTING_READ(vga_reg);
}
@@ -49343,7 +49432,7 @@
dev->mode_config.funcs = (void *)&intel_mode_funcs;
intel_init_quirks(dev);
-@@ -8957,6 +9270,9 @@ void intel_modeset_init(struct drm_device *dev)
+@@ -9012,6 +9270,9 @@ void intel_modeset_init(struct drm_device *dev)
for (i = 0; i < dev_priv->num_pipe; i++) {
intel_crtc_init(dev, i);
@@ -50380,10 +50469,18 @@
else
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 04d79fd..48177ec 100644
+index 72b8949..48177ec 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -47,8 +47,6 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
+@@ -28,7 +28,6 @@
+ * Chris Wilson <chris at chris-wilson.co.uk>
+ */
+
+-#include <linux/moduleparam.h>
+ #include "intel_drv.h"
+
+ #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
+@@ -48,8 +47,6 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
adjusted_mode->vtotal = fixed_mode->vtotal;
adjusted_mode->clock = fixed_mode->clock;
@@ -50392,7 +50489,7 @@
}
/* adjusted_mode has been preset to be the panel's fixed mode */
-@@ -141,8 +139,8 @@ static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
+@@ -142,8 +139,8 @@ static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
dev_priv->saveBLC_PWM_CTL2 = val;
} else if (val == 0) {
I915_WRITE(BLC_PWM_PCH_CTL2,
@@ -50403,6 +50500,50 @@
}
} else {
val = I915_READ(BLC_PWM_CTL);
+@@ -192,27 +189,6 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev)
+ return max;
+ }
+
+-static int i915_panel_invert_brightness;
+-MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
+- "(-1 force normal, 0 machine defaults, 1 force inversion), please "
+- "report PCI device ID, subsystem vendor and subsystem device ID "
+- "to dri-devel at lists.freedesktop.org, if your machine needs it. "
+- "It will then be included in an upcoming module version.");
+-module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
+-static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
+-{
+- struct drm_i915_private *dev_priv = dev->dev_private;
+-
+- if (i915_panel_invert_brightness < 0)
+- return val;
+-
+- if (i915_panel_invert_brightness > 0 ||
+- dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
+- return intel_panel_get_max_backlight(dev) - val;
+-
+- return val;
+-}
+-
+ u32 intel_panel_get_backlight(struct drm_device *dev)
+ {
+ struct drm_i915_private *dev_priv = dev->dev_private;
+@@ -233,7 +209,6 @@ u32 intel_panel_get_backlight(struct drm_device *dev)
+ }
+ }
+
+- val = intel_panel_compute_brightness(dev, val);
+ DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
+ return val;
+ }
+@@ -251,7 +226,6 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level
+ u32 tmp;
+
+ DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
+- level = intel_panel_compute_brightness(dev, level);
+
+ if (HAS_PCH_SPLIT(dev))
+ return intel_pch_panel_set_backlight(dev, level);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 4fddd21..c17325c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -100877,10 +101018,10 @@
+obj-$(CONFIG_DRM_UDL) := udl.o
diff --git a/drivers/gpu/drm/udl/udl_connector.c b/drivers/gpu/drm/udl/udl_connector.c
new file mode 100644
-index 0000000..3234224
+index 0000000..b8e6463
--- /dev/null
+++ b/drivers/gpu/drm/udl/udl_connector.c
-@@ -0,0 +1,161 @@
+@@ -0,0 +1,165 @@
+/*
+ * Copyright (C) 2012 Red Hat
+ * based in parts on udlfb.c:
@@ -100944,6 +101085,10 @@
+ int ret;
+
+ edid = (struct edid *)udl_get_edid(udl);
++ if (!edid) {
++ drm_mode_connector_update_edid_property(connector, NULL);
++ return 0;
++ }
+
+ connector->display_info.raw_edid = (char *)edid;
+
Modified: dists/sid/linux/debian/patches/series
==============================================================================
--- dists/sid/linux/debian/patches/series Sun Apr 28 19:21:19 2013 (r19985)
+++ dists/sid/linux/debian/patches/series Sun Apr 28 20:25:13 2013 (r19986)
@@ -466,6 +466,13 @@
bugfix/ia64/nouveau-ACPI-support-is-dependent-on-X86.patch
bugfix/x86/drm-i915-i8xx-interrupt-handler.patch
debian/radeon-firmware-is-required-for-drm-and-kms-on-r600-onward.patch
+bugfix/x86/drm-i915-panel-invert-brightness-via-parameter.patch
+bugfix/x86/drm-i915-panel-invert-brightness-via-quirk.patch
+bugfix/x86/drm-i915-panel-invert-brightness-acer-aspire-5734z.patch
+bugfix/x86/drm-i915-add-quirk_invert_brightness-for-ncr-machine.patch
+bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-g725.patch
+bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-emachines-e725.patch
+bugfix/x86/drm-i915-add-quirk-to-invert-brightness-on-packard-bell-ncl20.patch
bugfix/all/drm-nouveau-fix-init-with-agpgart-uninorth.patch
bugfix/x86/drm-i915-Close-race-between-processing-unpin-task-an.patch
bugfix/all/drm-radeon-dce32-use-fractional-fb-dividers-for-high.patch
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