[Pkg-electronics-devel] Processed: fixed 193802 in 0.9.1-1

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> fixed 193802 0.9.1-1
Bug #193802 {Done: أحمد المحمودي <aelmahmoudy at users.sourceforge.net>} [verilog] verilog: incorrect simulation results
There is no source info for the package 'verilog' at version '0.9.1-1' with architecture ''
Unable to make a source version for version '0.9.1-1'
Bug Marked as fixed in versions 0.9.1-1.
>
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