[electric] 13/19: Release 9.04+dfsg-1. Final adjustments.

[Markus Koschany]

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apo-guest pushed a commit to branch master
in repository electric.

commit 501acc770541ac90fd733f3d9db120edf7bbec00
Author: Markus Koschany <apo at gambaru.de>
Date:   Sat Apr 5 10:29:22 2014 +0000

    Release 9.04+dfsg-1. Final adjustments.
---
 debian/changelog           |   6 ++-
 debian/electric.1          | 103 ++++++++++++++++++++++++++-------------------
 debian/electric.desktop    |   4 +-
 debian/patches/build.patch |   1 +
 4 files changed, 67 insertions(+), 47 deletions(-)

diff --git a/debian/changelog b/debian/changelog
index 8caa66a..8511f4c 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -8,7 +8,7 @@ electric (9.04+dfsg-1) unstable; urgency=medium
     - Add myself to Uploaders.
     - Use canonical VCS fields.
     - New build-dependencies for plugins and additional features:
-     + scala, jython, libslf4j-java.
+      + scala, jython, libslf4j-java.
     - Use ${java:Depends} substvar.
     - Remove recommendation for libjava3d-java. It is a dependency now.
     - Depend on default-jre | java7-runtime.
@@ -30,8 +30,10 @@ electric (9.04+dfsg-1) unstable; urgency=medium
   * Move icons to debian/icons subdirectory.
   * Rename wrappers directory to bin.
   * Improve watch file. Mangle version correctly.
+  * electric.1: Update OPTIONS section for latest upstream release and remove
+    FILES paragraph.
 
- -- Markus Koschany <apo at gambaru.de>  Fri, 04 Apr 2014 13:51:14 +0200
+ -- Markus Koschany <apo at gambaru.de>  Sat, 05 Apr 2014 12:06:15 +0200
 
 electric (8.10-2) unstable; urgency=low
 
diff --git a/debian/electric.1 b/debian/electric.1
index 036d41e..870aa6a 100644
--- a/debian/electric.1
+++ b/debian/electric.1
@@ -3,13 +3,13 @@
 electric - a VLSI design system
 
 .SH SYNOPSIS
-\fBelectric\fR [\fI-m\fR] [\fI-t technology\fR] [\fIlibrary\fR]
+\fBelectric\fR [\fIOPTIONS\fR]
 
 .SH DESCRIPTION
 Electric is a general purpose system for all electrical design.
 It currently knows about nMOS, CMOS, Bipolar, artwork,
 schematics, printed-circuit boards, and many other technologies.
-Its has a large set of tools including
+It has a large set of tools including
 multiple design-rule checkers (both incremental and hierarchical),
 an electrical rules checker,
 over a dozen simulator interfaces,
@@ -29,13 +29,64 @@ Separate windows are used for text and graphics.
 If a \fIlibrary\fR disk file is mentioned on the command line, that
 file is read as the initial design for editing.
 In addition, the following switches are recognized:
-.IP -t
-specifies an initial technology.  The argument must be a technology name such as
-"nmos", "cmos", "mocmos" (MOSIS CMOS), "mocmossub" (MOSIS CMOS Submicron),
-"bipolar" (simple Bipolar),
-"schematic" (Schematic capture), or "artwork" (sketchpad mode).
-.IP -m
-specifies there may be multiple monitors and that Electric should look for them.
+
+.SH OPTIONS
+.TP
+\fB\-mdi
+.br
+\fRmultiple document interface mode
+.TP
+\fB\-sdi
+.br
+\fRsingle document interface mode
+.TP
+\fB\-NOMINMEM
+.br
+\fRignore minimum memory provided for JVM
+.TP
+\fB\-s <script name>
+.br
+\fRbean shell script to execute
+.TP
+\fB\-version
+.br
+\fRversion information
+.TP
+\fB\-v
+.br
+\fRbrief version information
+.TP
+\fB\-debug
+.br
+\fRdebug mode. Extra information is available
+.TP
+\fB\-threads <numThreads>
+.br
+\fRrecommended size of thread pool for Job execution.
+.TP
+\fB\-logging <filePath>
+.br
+\fRlog server events in a binary file
+.TP
+\fB\-socket <socket>
+.br
+\fRsocket port for client/server interaction
+.TP
+\fB\-batch
+.br
+\fRbatch mode implies 'no GUI', and nothing more
+.TP
+\fB\-server
+.br
+\fRdump trace of snapshots
+.TP
+\fB\-client <machine name>
+.br
+\fRreplay trace of snapshots
+.TP
+\fB\-help
+.br
+\fRthis message
 
 .SH REPRESENTATION
 Circuits are represented as networks that contain
@@ -249,37 +300,3 @@ Addison-Wesley, 1980.
 Electrical User's Guide.
 .br
 Electric Internals manual.
-
-.SH FILES
-.TS
-l l.
-~/.cadrc	Personal startup file
-~/electric.log	Session logging file
-*.elib	Binary input/output files
-*.txt	Text input/output files
-*.cif	CIF input/output files
-*.pla	PLA personality input files
-*.map	Color map files
-*.mac	Macro files
-*.sim	ESIM, RSIM, RNL, and COSMOS simulation output
-rsim.in	RSIM simulation binary output
-rnl.in	RNL simulation binary output
-*.spi	SPICE simulation output
-*.ver	VERILOG simulation output
-*.ntk	MOSSIM simulation output
-*.sil	SILOS simulation output
-*.tdl	TEXSIM simulation output
-*.pal	ABLE PAL simulation output
-
-/usr/local/bin/findfastshorts	Fast short circuit checker
-/usr/local/bin/fastshorts	Slow short circuit checker
-/usr/local/bin/esim	Switch level simulator: ESIM
-/usr/local/bin/rsim	Switch level simulator: RSIM
-/usr/local/bin/rnl	Switch level simulator: RNL
-/usr/local/bin/presim	RNL and RSIM pre-filter
-/usr/local/bin/spice	Circuit level simulator: SPICE
-/usr/local/electric/lib/nl.l	RNL startup file
-.TE
-
-
-
diff --git a/debian/electric.desktop b/debian/electric.desktop
index 56a6ca6..262fa61 100644
--- a/debian/electric.desktop
+++ b/debian/electric.desktop
@@ -1,6 +1,6 @@
 [Desktop Entry]
 Version=1.0
-Name=electric
+Name=Electric
 GenericName=Electrical CAD
 Comment=Electrical CAD System
 Comment[de]=CAD-System für elektrische Schaltpläne
@@ -8,4 +8,4 @@ Type=Application
 Exec=electric
 Icon=electric
 Categories=Education;Electronics;Engineering;
-Keywords=CAD;editor;electrical;circuits;engineering;
+Keywords=CAD;editor;EDA;electrical;circuit;ic;design;engineering;
diff --git a/debian/patches/build.patch b/debian/patches/build.patch
index 9aa8b19..270d476 100644
--- a/debian/patches/build.patch
+++ b/debian/patches/build.patch
@@ -2,6 +2,7 @@ From: Markus Koschany <apo at gambaru.de>
 Date: Fri, 4 Apr 2014 17:29:02 +0200
 Subject: build
 
+Forwarded: not-needed
 ---
  build.xml | 18 +++++++++++-------
  1 file changed, 11 insertions(+), 7 deletions(-)

-- 
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