[Pkg-virtualbox-commits] r163 - in trunk/debian: . patches
meskes at alioth.debian.org
meskes at alioth.debian.org
Sat Dec 29 14:04:21 UTC 2007
Author: meskes
Date: 2007-12-29 14:04:20 +0000 (Sat, 29 Dec 2007)
New Revision: 163
Added:
trunk/debian/patches/01-no-64bit-guest.dpatch
trunk/debian/patches/08-module-build.dpatch
trunk/debian/patches/09-no-registration.dpatch
Removed:
trunk/debian/patches/01-configure.dpatch
trunk/debian/patches/08-no-kernel.dpatch
trunk/debian/patches/09-fix-initscript.dpatch
trunk/debian/patches/10-no-registration.dpatch
trunk/debian/patches/11-module-build.dpatch
trunk/debian/patches/12-kcompat-2.6.24.dpatch
trunk/debian/patches/13-no-64bit-guest.dpatch
Modified:
trunk/debian/changelog
trunk/debian/control
trunk/debian/copyright
trunk/debian/patches/00list
trunk/debian/rules
trunk/debian/virtualbox-ose.install
trunk/debian/virtualbox-ose.links
Log:
New upstream version.
Removed some new files because of licensing problems.
Removed some patches because they are not needed anymore.
Rediffed and renumbered the remaining patches.
Added build dependency on libpulse-dev.
Moved shell scripts from /usr/lib to /usr/share.
Modified: trunk/debian/changelog
===================================================================
--- trunk/debian/changelog 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/changelog 2007-12-29 14:04:20 UTC (rev 163)
@@ -5,11 +5,23 @@
yet.
* Removed build time dependency on i32-libs that is not really needed.
* New upstream version.
+ * Removed some new files because of licensing problems:
+ ./src/VBox/Additions/linux/selinux-fedora
+ ./src/VBox/Additions/linux/xmouse/Imakefile
+ ./src/VBox/HostServices/SharedClipboard/linux-stub.cpp
+ * Removed the following patches because they are not needed anymore:
+ 01-configure.dpatch
+ 08-no-kernel.dpatch
+ 09-fix-initscript.dpatch
+ 12-kcompat-2.6.24.dpatch
+ * Rediffed and renumbered the remaining patches.
+ * Added build dependency on libpulse-dev.
+ * Moved shell scripts from /usr/lib to /usr/share.
[ Hilko Bengen ]
* Make dh_strip ignore symlink(s) in /usr/share
- -- Hilko Bengen <bengen at debian.org> Wed, 26 Dec 2007 00:43:45 +0100
+ -- Michael Meskes <meskes at debian.org> Sat, 29 Dec 2007 14:52:41 +0100
virtualbox-ose (1.5.2-dfsg2-7) unstable; urgency=low
Modified: trunk/debian/control
===================================================================
--- trunk/debian/control 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/control 2007-12-29 14:04:20 UTC (rev 163)
@@ -3,7 +3,7 @@
Priority: extra
Maintainer: Debian Virtualbox Team <pkg-virtualbox-devel at lists.alioth.debian.org>
Uploaders: Philipp Hug <debian at hug.cx>, Marvin Stark <marv at der-marv.de>, Michael Meskes <meskes at debian.org>, Patrick Winnertz <winnie at debian.org>, Daniel Baumann <daniel at debian.org>, Hilko Bengen <bengen at debian.org>
-Build-Depends: debhelper (>= 5), dpatch, bcc, bzip2, g++-multilib [amd64], iasl, kbuild, libacl1-dev, libasound-dev, libc6-dev-i386 [amd64], libhal-dev, libidl-dev, libqt3-mt-dev, libsdl1.2-dev, libxalan110-dev, uuid-dev, xalan, xsltproc, yasm
+Build-Depends: debhelper (>= 5), dpatch, bcc, bzip2, g++-multilib [amd64], iasl, kbuild, libacl1-dev, libasound-dev, libc6-dev-i386 [amd64], libhal-dev, libidl-dev, libqt3-mt-dev, libsdl1.2-dev, libxalan110-dev, uuid-dev, xalan, xsltproc, yasm, libpulse-dev
Standards-Version: 3.7.3
Homepage: http://www.virtualbox.org/
Vcs-Svn: svn://svn.debian.org/svn/pkg-virtualbox/trunk
Modified: trunk/debian/copyright
===================================================================
--- trunk/debian/copyright 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/copyright 2007-12-29 14:04:20 UTC (rev 163)
@@ -50,6 +50,7 @@
./src/VBox/Runtime/table/avlu32.cpp
./src/VBox/Runtime/table/avlul.cpp
./src/VBox/Runtime/table/table.cpp
+./src/VBox/Devices/VBoxDDUDeps.cpp
Copyright (c) 2005-2007 knut st. osmundsen <bird-src-spam at anduin.net>
./include/avl.h
@@ -240,10 +241,11 @@
A copy of this license is appended below.
-------------------------------------------------------------------------------
-The complete subtree ./src/VBox/Additions/Linux/x11include is taken from the X
+Large part of the ./src/VBox/Additions/Linux/ subtree is taken from the X
sources and still carries the original license. Some work under
./src/VBox/Additions/Linux was derived from the X sources and carries both, the
-original X license and the innotek GPL license.
+original X license and the innotek GPL license. The remaining sources under
+./src/VBox/Additions/Linux only carry the innotek GPL license.
-------------------------------------------------------------------------------
Modified: trunk/debian/patches/00list
===================================================================
--- trunk/debian/patches/00list 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/00list 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,13 +1,9 @@
-01-configure.dpatch
+01-no-64bit-guest.dpatch
02-host-module.dpatch
03-config-kmk.dpatch
04-localconf-kmk.dpatch
05-vboxdrv-references.dpatch
06-vboxadd-udev.dpatch
07-xsession.dpatch
-08-no-kernel.dpatch
-09-fix-initscript.dpatch
-10-no-registration.dpatch
-11-module-build.dpatch
-12-kcompat-2.6.24.dpatch
-13-no-64bit-guest.dpatch
+08-module-build.dpatch
+09-no-registration.dpatch
Deleted: trunk/debian/patches/01-configure.dpatch
===================================================================
--- trunk/debian/patches/01-configure.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/01-configure.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,21 +0,0 @@
-#!/bin/sh /usr/share/dpatch/dpatch-run
-## 01-configure.dpatch by Patrick Winnertz <patrick.winnertz at skolelinux.org>
-##
-## DP: Use Debians kbuild instead; doesn't build module
-
- at DPATCH@
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg.orig/configure virtualbox-ose-1.5.2-dfsg/configure
---- virtualbox-ose-1.5.2-dfsg.orig/configure 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg/configure 2007-10-18 20:09:49.000000000 +0000
-@@ -265,8 +265,8 @@ check_environment()
- exit 1
- ;;
- esac
-- DEVDIR_BIN="$DEVDIR/$OS.$BUILD_MACHINE/bin"
-- KBUILDDIR_BIN="$KBUILDDIR/bin/$OS.$BUILD_MACHINE"
-+ DEVDIR_BIN="/usr/bin"
-+ KBUILDDIR_BIN="/usr/bin"
- KBUILD_SED="$KBUILDDIR_BIN/kmk_sed"
- log_success "Determined build machine: $OS.$BUILD_MACHINE, target machine: $OS.$TARGET_MACHINE"
-
Added: trunk/debian/patches/01-no-64bit-guest.dpatch
===================================================================
--- trunk/debian/patches/01-no-64bit-guest.dpatch (rev 0)
+++ trunk/debian/patches/01-no-64bit-guest.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -0,0 +1,50 @@
+#! /bin/sh /usr/share/dpatch/dpatch-run
+## 13-no-64bit-guest.dpatch by Michael Meskes <meskes at debian.org>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Do not build guest utils on 64 bit architectures
+
+ at DPATCH@
+
+--- virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/Makefile.kmk.orig 2007-10-18 13:07:28.000000000 +0200
++++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/Makefile.kmk 2007-12-23 13:49:48.000000000 +0100
+@@ -22,10 +22,13 @@
+ ifeq ($(filter-out linux l4, $(BUILD_TARGET)),)
+ SUBDIRS += \
+ module \
++ sharedfolders
++endif
++ifeq ($(filter-out x86, $(BUILD_TARGET_ARCH)),)
++SUBDIRS += \
+ daemon \
+ xgraphics \
+ xmouse \
+- sharedfolders \
+ xclient
+ endif
+
+--- virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.kmk.orig 2007-08-30 17:16:27.000000000 +0200
++++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.kmk 2007-12-23 13:50:36.000000000 +0100
+@@ -20,7 +20,10 @@
+ ifdef VBOX_WITH_LINUX_ADDITIONS_32BIT_R0
+ SYSMODS = vboxvfs
+ endif
+-PROGRAMS = mountvboxsf
++PROGRAMS =
++ifeq ($(filter-out x86, $(BUILD_TARGET_ARCH)),)
++PROGRAMS += mountvboxsf
++endif
+ INSTALLS = vboxvfs-bin vboxvfs-sh
+
+ #
+--- virtualbox-ose-1.5.2-dfsg2/configure.orig 2007-12-23 15:15:43.000000000 +0100
++++ virtualbox-ose-1.5.2-dfsg2/configure 2007-12-23 15:16:44.000000000 +0100
+@@ -230,7 +230,7 @@
+ check_environment()
+ {
+ test_header environment
+- BUILD_CPU=`uname -m`
++ BUILD_CPU=`dpkg --print-architecture`
+ case "$BUILD_CPU" in
+ i[3456789]86|x86|i86pc)
+ BUILD_MACHINE='x86'
Property changes on: trunk/debian/patches/01-no-64bit-guest.dpatch
___________________________________________________________________
Name: svn:executable
+ *
Added: trunk/debian/patches/08-module-build.dpatch
===================================================================
--- trunk/debian/patches/08-module-build.dpatch (rev 0)
+++ trunk/debian/patches/08-module-build.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -0,0 +1,61 @@
+#!/bin/sh /usr/share/dpatch/dpatch-run
+## 11-module-build.dpatch by Michael Meskes <meskes at debian.org>
+##
+## DP: Build module correctly in linux-modules-extra
+
+ at DPATCH@
+
+diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/module/Makefile.module virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/module/Makefile.module
+--- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/module/Makefile.module 2007-10-18 11:07:28.000000000 +0000
++++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/module/Makefile.module 2007-12-18 14:54:07.000000000 +0000
+@@ -14,7 +14,7 @@
+ # be useful, but WITHOUT ANY WARRANTY of any kind.
+
+ #
+-MODULE = vboxadd
++override MODULE = vboxadd
+ OBJS = \
+ cmc.o \
+ hgcmcall.o \
+@@ -92,6 +92,8 @@ ifndef INCL
+ ifndef KBUILD_EXTMOD
+ KBUILD_EXTMOD := $(shell pwd)
+ endif
++# make sure we have a correct path
++ KBUILD_EXTMOD := $(subst $(MODULE),,$(KBUILD_EXTMOD))/$(MODULE)
+ INCL += $(addprefix -I$(KBUILD_EXTMOD),/ /include /r0drv/linux)
+ export INCL
+ endif
+diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/sharedfolders/Makefile.module virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.module
+--- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/sharedfolders/Makefile.module 2007-10-18 11:07:28.000000000 +0000
++++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.module 2007-12-18 14:54:07.000000000 +0000
+@@ -14,7 +14,7 @@
+ # be useful, but WITHOUT ANY WARRANTY of any kind.
+
+ #
+-MODULE = vboxvfs
++override MODULE = vboxvfs
+ OBJS = \
+ vfsmod.o \
+ vfs-utils.o \
+@@ -99,6 +99,8 @@ ifndef INCL
+ ifndef KBUILD_EXTMOD
+ KBUILD_EXTMOD := $(shell pwd)
+ endif
++# make sure we have a correct path
++ KBUILD_EXTMOD := $(subst $(MODULE),,$(KBUILD_EXTMOD))/$(MODULE)
+ INCL += $(addprefix -I$(KBUILD_EXTMOD),/ /include /r0drv/linux)
+ export INCL
+ endif
+diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/HostDrivers/Support/linux/Makefile virtualbox-ose-1.5.2-dfsg2/src/VBox/HostDrivers/Support/linux/Makefile
+--- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/HostDrivers/Support/linux/Makefile 2007-10-18 11:07:28.000000000 +0000
++++ virtualbox-ose-1.5.2-dfsg2/src/VBox/HostDrivers/Support/linux/Makefile 2007-12-18 14:54:07.000000000 +0000
+@@ -40,7 +40,7 @@ ifeq ($(BUILD_TARGET_ARCH),)
+ endif
+
+
+-MODULE = vboxdrv
++override MODULE = vboxdrv
+ OBJS = \
+ linux/SUPDrv-linux.o \
+ SUPDRVShared.o \
Property changes on: trunk/debian/patches/08-module-build.dpatch
___________________________________________________________________
Name: svn:executable
+ *
Deleted: trunk/debian/patches/08-no-kernel.dpatch
===================================================================
--- trunk/debian/patches/08-no-kernel.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/08-no-kernel.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,51 +0,0 @@
-#!/bin/sh /usr/share/dpatch/dpatch-run
-## 08-no-kernel.dpatch by Michael Meskes <meskes at debian.org>
-##
-## DP: Build without kernel sources. New configure option taken from SVN.
-
- at DPATCH@
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg.orig/configure virtualbox-ose-1.5.2-dfsg/configure
---- virtualbox-ose-1.5.2-dfsg.orig/configure 2007-12-20 11:27:07.000000000 +0100
-+++ virtualbox-ose-1.5.2-dfsg/configure 2007-12-20 11:28:35.000000000 +0100
-@@ -36,6 +36,7 @@
- WITH_SDL=1
- WITH_SDL_TTF=1
- WITH_X11=1
-+WITH_KMODS=1
- CC="gcc"
- CC32=""
- CC64=""
-@@ -1216,6 +1217,7 @@
- --nofatal don't abort on errors
- --disable-xpcom disable XPCOM and related stuff
- --disable-sdl-ttf disable SDL_ttf detection
-+ --disable-kmods don't build Linux kernel modules (host and guest)
- --build-xalan build xalan & xerces from shipped sources
- --setup-wine setup a Wine directory and register the hhc hack
-
-@@ -1307,6 +1309,9 @@
- --disable-qt)
- WITH_QT=0
- ;;
-+ --disable-kmods)
-+ WITH_KMODS=0
-+ ;;
- --build-debug|-d)
- BUILD_TYPE=debug
- ;;
-@@ -1450,7 +1455,13 @@
-
- # Linux-specific
- if [ "$OS" = "linux" ]; then
-- check_linux
-+ if [ $WITH_KMODS -eq 1 ]; then
-+ check_linux
-+ else
-+ cnf_append "VBOX_LINUX_SRC" ""
-+ cnf_append "VBOX_WITH_VBOXDRV" ""
-+ cnf_append "VBOX_WITH_LINUX_ADDITIONS_32BIT_R0" ""
-+ fi
- check_alsa
- check_compiler_h
- [ "$BUILD_MACHINE" = "amd64" ] && check_32bit
Deleted: trunk/debian/patches/09-fix-initscript.dpatch
===================================================================
--- trunk/debian/patches/09-fix-initscript.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/09-fix-initscript.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,31 +0,0 @@
-#!/bin/sh /usr/share/dpatch/dpatch-run
-## 09-quiet-grep.dpatch by Michael Meskes <meskes at debian.org>
-## modified by Patrick Winnert <winnie at debian.org>
-##
-## DP: Make grep be quiet
-## DP: Add an short description to make lintian silent.
-
- at DPATCH@
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Installer/linux/vboxnet.sh virtualbox-ose-1.5.2-dfsg2/src/VBox/Installer/linux/vboxnet.sh
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Installer/linux/vboxnet.sh 2007-08-30 15:16:26.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Installer/linux/vboxnet.sh 2007-12-18 14:52:30.000000000 +0000
-@@ -23,7 +23,8 @@
- # Required-Stop:
- # Default-Start: 3 5
- # Default-Stop:
--# Description: VirtualBox permanent host networking setup
-+# Short-Description: Virtualbox permanent host networking setup
-+# Description: This initscript sets up the networking for Virtualbox
- ### END INIT INFO
-
- PATH=$PATH:/bin:/sbin:/usr/sbin
-@@ -236,7 +237,7 @@ start_network() {
- done < "$CONFIG"
- # Set /dev/net/tun to belong to the group vboxusers if it exists and does
- # yet belong to a group.
-- if ls -g "$TAPDEV" 2>/dev/null | grep root
-+ if ls -g "$TAPDEV" 2>/dev/null | grep -q root
- then
- chgrp vboxusers "$TAPDEV"
- chmod 0660 "$TAPDEV"
Added: trunk/debian/patches/09-no-registration.dpatch
===================================================================
--- trunk/debian/patches/09-no-registration.dpatch (rev 0)
+++ trunk/debian/patches/09-no-registration.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -0,0 +1,22 @@
+#!/bin/sh /usr/share/dpatch/dpatch-run
+## 10-no-registration.dpatch by Michael Meskes <meskes at debian.org>
+##
+## DP: Do not ask for registration
+
+ at DPATCH@
+
+diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Frontends/VirtualBox/Makefile.kmk virtualbox-ose-1.5.2-dfsg2/src/VBox/Frontends/VirtualBox/Makefile.kmk
+--- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Frontends/VirtualBox/Makefile.kmk 2007-10-18 11:07:28.000000000 +0000
++++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Frontends/VirtualBox/Makefile.kmk 2007-12-18 14:53:06.000000000 +0000
+@@ -38,9 +38,9 @@ include $(PATH_KBUILD)/header.kmk
+ #
+ # exclude inappropriate UI content
+ #
+-#ifndef VBOX_OSE
++ifndef VBOX_OSE
+ VBOX_WITH_REGISTRATION := 1
+-#endif
++endif
+
+ ifndef VBOX_WITH_REGISTRATION
+ VirtualBox_QT_UISRCS := $(filter-out ui/VBoxRegistrationDlg.ui,$(VirtualBox_QT_UISRCS))
Property changes on: trunk/debian/patches/09-no-registration.dpatch
___________________________________________________________________
Name: svn:executable
+ *
Deleted: trunk/debian/patches/10-no-registration.dpatch
===================================================================
--- trunk/debian/patches/10-no-registration.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/10-no-registration.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,22 +0,0 @@
-#!/bin/sh /usr/share/dpatch/dpatch-run
-## 10-no-registration.dpatch by Michael Meskes <meskes at debian.org>
-##
-## DP: Do not ask for registration
-
- at DPATCH@
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Frontends/VirtualBox/Makefile.kmk virtualbox-ose-1.5.2-dfsg2/src/VBox/Frontends/VirtualBox/Makefile.kmk
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Frontends/VirtualBox/Makefile.kmk 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Frontends/VirtualBox/Makefile.kmk 2007-12-18 14:53:06.000000000 +0000
-@@ -38,9 +38,9 @@ include $(PATH_KBUILD)/header.kmk
- #
- # exclude inappropriate UI content
- #
--#ifndef VBOX_OSE
-+ifndef VBOX_OSE
- VBOX_WITH_REGISTRATION := 1
--#endif
-+endif
-
- ifndef VBOX_WITH_REGISTRATION
- VirtualBox_QT_UISRCS := $(filter-out ui/VBoxRegistrationDlg.ui,$(VirtualBox_QT_UISRCS))
Deleted: trunk/debian/patches/11-module-build.dpatch
===================================================================
--- trunk/debian/patches/11-module-build.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/11-module-build.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,61 +0,0 @@
-#!/bin/sh /usr/share/dpatch/dpatch-run
-## 11-module-build.dpatch by Michael Meskes <meskes at debian.org>
-##
-## DP: Build module correctly in linux-modules-extra
-
- at DPATCH@
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/module/Makefile.module virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/module/Makefile.module
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/module/Makefile.module 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/module/Makefile.module 2007-12-18 14:54:07.000000000 +0000
-@@ -14,7 +14,7 @@
- # be useful, but WITHOUT ANY WARRANTY of any kind.
-
- #
--MODULE = vboxadd
-+override MODULE = vboxadd
- OBJS = \
- cmc.o \
- hgcmcall.o \
-@@ -92,6 +92,8 @@ ifndef INCL
- ifndef KBUILD_EXTMOD
- KBUILD_EXTMOD := $(shell pwd)
- endif
-+# make sure we have a correct path
-+ KBUILD_EXTMOD := $(subst $(MODULE),,$(KBUILD_EXTMOD))/$(MODULE)
- INCL += $(addprefix -I$(KBUILD_EXTMOD),/ /include /r0drv/linux)
- export INCL
- endif
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/sharedfolders/Makefile.module virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.module
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Additions/linux/sharedfolders/Makefile.module 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.module 2007-12-18 14:54:07.000000000 +0000
-@@ -14,7 +14,7 @@
- # be useful, but WITHOUT ANY WARRANTY of any kind.
-
- #
--MODULE = vboxvfs
-+override MODULE = vboxvfs
- OBJS = \
- vfsmod.o \
- vfs-utils.o \
-@@ -99,6 +99,8 @@ ifndef INCL
- ifndef KBUILD_EXTMOD
- KBUILD_EXTMOD := $(shell pwd)
- endif
-+# make sure we have a correct path
-+ KBUILD_EXTMOD := $(subst $(MODULE),,$(KBUILD_EXTMOD))/$(MODULE)
- INCL += $(addprefix -I$(KBUILD_EXTMOD),/ /include /r0drv/linux)
- export INCL
- endif
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/HostDrivers/Support/linux/Makefile virtualbox-ose-1.5.2-dfsg2/src/VBox/HostDrivers/Support/linux/Makefile
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/HostDrivers/Support/linux/Makefile 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/HostDrivers/Support/linux/Makefile 2007-12-18 14:54:07.000000000 +0000
-@@ -40,7 +40,7 @@ ifeq ($(BUILD_TARGET_ARCH),)
- endif
-
-
--MODULE = vboxdrv
-+override MODULE = vboxdrv
- OBJS = \
- linux/SUPDrv-linux.o \
- SUPDRVShared.o \
Deleted: trunk/debian/patches/12-kcompat-2.6.24.dpatch
===================================================================
--- trunk/debian/patches/12-kcompat-2.6.24.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/12-kcompat-2.6.24.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,4909 +0,0 @@
-#!/bin/sh /usr/share/dpatch/dpatch-run
-## 12-kcompat-2.6.24.dpatch by Stefan Lippers-Hollmann <s.l-h at gmx.de>
-##
-## DP: six kernel 2.6.24 compatibility.
-
- at DPATCH@
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/Config.kmk virtualbox-ose-1.5.2-dfsg2/Config.kmk
---- virtualbox-ose-1.5.2-dfsg2.orig/Config.kmk 2007-10-18 12:16:17.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/Config.kmk 2007-12-18 14:54:48.000000000 +0000
-@@ -1204,7 +1204,7 @@ ifneq ($(filter linux,$(BUILD_TARGET)),)
- kernelpath := $(VBOX_LINUX_SRC)
- endif
- ifeq ($(BUILD_TARGET_ARCH),x86)
-- VBOX_LINUX_INCS += $(kernelpath)/include/asm-i386/mach-default
-+ VBOX_LINUX_INCS += $(kernelpath)/include/asm/mach-default
- endif
- endif
- endif
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/VBoxDev.h virtualbox-ose-1.5.2-dfsg2/include/VBox/VBoxDev.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/VBoxDev.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/VBoxDev.h 2007-12-18 14:54:48.000000000 +0000
-@@ -24,33 +24,33 @@ __BEGIN_DECLS
- /** Mouse capability bits
- * @{ */
- /** the guest requests absolute mouse coordinates (guest additions installed) */
--#define VMMDEV_MOUSEGUESTWANTSABS BIT(0)
-+#define VMMDEV_MOUSEGUESTWANTSABS RT_BIT(0)
- /** the host wants to send absolute mouse coordinates (input not captured) */
--#define VMMDEV_MOUSEHOSTWANTSABS BIT(1)
-+#define VMMDEV_MOUSEHOSTWANTSABS RT_BIT(1)
- /** the guest needs a hardware cursor on host. When guest additions are installed
- * and the host has promised to display the cursor itself, the guest installs a
- * hardware mouse driver. Don't ask the guest to switch to a software cursor then. */
--#define VMMDEV_MOUSEGUESTNEEDSHOSTCUR BIT(2)
-+#define VMMDEV_MOUSEGUESTNEEDSHOSTCUR RT_BIT(2)
- /** the host is NOT able to draw the cursor itself (e.g. L4 console) */
--#define VMMDEV_MOUSEHOSTCANNOTHWPOINTER BIT(3)
-+#define VMMDEV_MOUSEHOSTCANNOTHWPOINTER RT_BIT(3)
- /** @} */
-
- /** Flags for pfnSetCredentials
- * @{ */
- /** the guest should perform a logon with the credentials */
--#define VMMDEV_SETCREDENTIALS_GUESTLOGON BIT(0)
-+#define VMMDEV_SETCREDENTIALS_GUESTLOGON RT_BIT(0)
- /** the guest should prevent local logons */
--#define VMMDEV_SETCREDENTIALS_NOLOCALLOGON BIT(1)
-+#define VMMDEV_SETCREDENTIALS_NOLOCALLOGON RT_BIT(1)
- /** the guest should verify the credentials */
--#define VMMDEV_SETCREDENTIALS_JUDGE BIT(15)
-+#define VMMDEV_SETCREDENTIALS_JUDGE RT_BIT(15)
- /** @} */
-
- /** Guest capability bits
- * @{ */
- /** the guest supports seamless display rendering */
--#define VMMDEV_GUEST_SUPPORTS_SEAMLESS BIT(0)
-+#define VMMDEV_GUEST_SUPPORTS_SEAMLESS RT_BIT(0)
- /** the guest supports mapping guest to host windows */
--#define VMMDEV_GUEST_SUPPORTS_GUEST_HOST_WINDOW_MAPPING BIT(1)
-+#define VMMDEV_GUEST_SUPPORTS_GUEST_HOST_WINDOW_MAPPING RT_BIT(1)
- /** @} */
-
- /** Size of VMMDev RAM region accessible by guest.
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/VBoxGuest.h virtualbox-ose-1.5.2-dfsg2/include/VBox/VBoxGuest.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/VBoxGuest.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/VBoxGuest.h 2007-12-18 14:54:48.000000000 +0000
-@@ -77,13 +77,13 @@ typedef uint32_t vmmDevHypPhys;
- */
-
- /** guest can (== wants to) handle absolute coordinates */
--#define VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE BIT(0)
-+#define VBOXGUEST_MOUSE_GUEST_CAN_ABSOLUTE RT_BIT(0)
- /** host can (== wants to) send absolute coordinates */
--#define VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE BIT(1)
-+#define VBOXGUEST_MOUSE_HOST_CAN_ABSOLUTE RT_BIT(1)
- /** guest can *NOT* switch to software cursor and therefore depends on the host cursor */
--#define VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR BIT(2)
-+#define VBOXGUEST_MOUSE_GUEST_NEEDS_HOST_CURSOR RT_BIT(2)
- /** host does NOT provide support for drawing the cursor itself (e.g. L4 console) */
--#define VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER BIT(3)
-+#define VBOXGUEST_MOUSE_HOST_CANNOT_HWPOINTER RT_BIT(3)
-
- /** fictive start address of the hypervisor physical memory for MmMapIoSpace */
- #define HYPERVISOR_PHYSICAL_START 0xf8000000
-@@ -915,17 +915,17 @@ typedef struct
- */
-
- /** Host mouse capabilities has been changed. */
--#define VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED BIT(0)
-+#define VMMDEV_EVENT_MOUSE_CAPABILITIES_CHANGED RT_BIT(0)
- /** HGCM event. */
--#define VMMDEV_EVENT_HGCM BIT(1)
-+#define VMMDEV_EVENT_HGCM RT_BIT(1)
- /** A display change request has been issued. */
--#define VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST BIT(2)
-+#define VMMDEV_EVENT_DISPLAY_CHANGE_REQUEST RT_BIT(2)
- /** Credentials are available for judgement. */
--#define VMMDEV_EVENT_JUDGE_CREDENTIALS BIT(3)
-+#define VMMDEV_EVENT_JUDGE_CREDENTIALS RT_BIT(3)
- /** The guest has been restored. */
--#define VMMDEV_EVENT_RESTORED BIT(4)
-+#define VMMDEV_EVENT_RESTORED RT_BIT(4)
- /** Seamless mode state changed */
--#define VMMDEV_EVENT_SEAMLESS_MODE_CHANGE_REQUEST BIT(5)
-+#define VMMDEV_EVENT_SEAMLESS_MODE_CHANGE_REQUEST RT_BIT(5)
-
-
- /** @} */
-@@ -1144,26 +1144,26 @@ typedef struct _VBoxGuestHGCMCallInfo
- #define VMMDEV_CREDENTIALS_STRLEN 128
-
- /** query from host whether credentials are present */
--#define VMMDEV_CREDENTIALS_QUERYPRESENCE BIT(1)
-+#define VMMDEV_CREDENTIALS_QUERYPRESENCE RT_BIT(1)
- /** read credentials from host (can be combined with clear) */
--#define VMMDEV_CREDENTIALS_READ BIT(2)
-+#define VMMDEV_CREDENTIALS_READ RT_BIT(2)
- /** clear credentials on host (can be combined with read) */
--#define VMMDEV_CREDENTIALS_CLEAR BIT(3)
-+#define VMMDEV_CREDENTIALS_CLEAR RT_BIT(3)
- /** read credentials for judgement in the guest */
--#define VMMDEV_CREDENTIALS_READJUDGE BIT(8)
-+#define VMMDEV_CREDENTIALS_READJUDGE RT_BIT(8)
- /** clear credentials for judegement on the host */
--#define VMMDEV_CREDENTIALS_CLEARJUDGE BIT(9)
-+#define VMMDEV_CREDENTIALS_CLEARJUDGE RT_BIT(9)
- /** report credentials acceptance by guest */
--#define VMMDEV_CREDENTIALS_JUDGE_OK BIT(10)
-+#define VMMDEV_CREDENTIALS_JUDGE_OK RT_BIT(10)
- /** report credentials denial by guest */
--#define VMMDEV_CREDENTIALS_JUDGE_DENY BIT(11)
-+#define VMMDEV_CREDENTIALS_JUDGE_DENY RT_BIT(11)
- /** report that no judgement could be made by guest */
--#define VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT BIT(12)
-+#define VMMDEV_CREDENTIALS_JUDGE_NOJUDGEMENT RT_BIT(12)
-
- /** flag telling the guest that credentials are present */
--#define VMMDEV_CREDENTIALS_PRESENT BIT(16)
-+#define VMMDEV_CREDENTIALS_PRESENT RT_BIT(16)
- /** flag telling guest that local logons should be prohibited */
--#define VMMDEV_CREDENTIALS_NOLOCALLOGON BIT(17)
-+#define VMMDEV_CREDENTIALS_NOLOCALLOGON RT_BIT(17)
-
- /** credentials request structure */
- #pragma pack(4)
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/cpum.h virtualbox-ose-1.5.2-dfsg2/include/VBox/cpum.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/cpum.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/cpum.h 2007-12-18 14:54:48.000000000 +0000
-@@ -592,17 +592,17 @@ CPUMDECL(int) CPUMRestoreHostFPUState(PV
- * to clear them is REM!
- * @{
- */
--#define CPUM_CHANGED_FPU_REM BIT(0)
--#define CPUM_CHANGED_CR0 BIT(1)
--#define CPUM_CHANGED_CR4 BIT(2)
--#define CPUM_CHANGED_GLOBAL_TLB_FLUSH BIT(3)
--#define CPUM_CHANGED_CR3 BIT(4)
--#define CPUM_CHANGED_GDTR BIT(5)
--#define CPUM_CHANGED_IDTR BIT(6)
--#define CPUM_CHANGED_LDTR BIT(7)
--#define CPUM_CHANGED_TR BIT(8)
--#define CPUM_CHANGED_SYSENTER_MSR BIT(9)
--#define CPUM_CHANGED_HIDDEN_SEL_REGS BIT(10)
-+#define CPUM_CHANGED_FPU_REM RT_BIT(0)
-+#define CPUM_CHANGED_CR0 RT_BIT(1)
-+#define CPUM_CHANGED_CR4 RT_BIT(2)
-+#define CPUM_CHANGED_GLOBAL_TLB_FLUSH RT_BIT(3)
-+#define CPUM_CHANGED_CR3 RT_BIT(4)
-+#define CPUM_CHANGED_GDTR RT_BIT(5)
-+#define CPUM_CHANGED_IDTR RT_BIT(6)
-+#define CPUM_CHANGED_LDTR RT_BIT(7)
-+#define CPUM_CHANGED_TR RT_BIT(8)
-+#define CPUM_CHANGED_SYSENTER_MSR RT_BIT(9)
-+#define CPUM_CHANGED_HIDDEN_SEL_REGS RT_BIT(10)
- /** @} */
-
- /**
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/dbg.h virtualbox-ose-1.5.2-dfsg2/include/VBox/dbg.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/dbg.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/dbg.h 2007-12-18 14:54:48.000000000 +0000
-@@ -152,7 +152,7 @@ typedef const DBGCVARDESC *PCDBGCVARDESC
- /** Variable descriptor flags.
- * @{ */
- /** Indicates that the variable depends on the previous being present. */
--#define DBGCVD_FLAGS_DEP_PREV BIT(1)
-+#define DBGCVD_FLAGS_DEP_PREV RT_BIT(1)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/dbgf.h virtualbox-ose-1.5.2-dfsg2/include/VBox/dbgf.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/dbgf.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/dbgf.h 2007-12-18 14:54:48.000000000 +0000
-@@ -134,11 +134,11 @@ typedef const DBGFADDRESS *PCDBGFADDRESS
- #define DBGFADDRESS_FLAGS_TYPE_MASK 3
-
- /** Set if the address is valid. */
--#define DBGFADDRESS_FLAGS_VALID BIT(2)
-+#define DBGFADDRESS_FLAGS_VALID RT_BIT(2)
-
- /** The address is within the hypervisor memoary area (HMA).
- * If not set, the address can be assumed to be a guest address. */
--#define DBGFADDRESS_FLAGS_HMA BIT(3)
-+#define DBGFADDRESS_FLAGS_HMA RT_BIT(3)
-
- /** Checks if the mixed address is flat or not. */
- #define DBGFADDRESS_IS_FLAT(pAddress) ( ((pAddress)->fFlags & DBGFADDRESS_FLAGS_TYPE_MASK) == DBGFADDRESS_FLAGS_FLAT )
-@@ -832,7 +832,7 @@ typedef FNDBGFHANDLEREXT *PFNDBGFHANDLE
- /** @name Flags for the info registration functions.
- * @{ */
- /** The handler must run on the EMT. */
--#define DBGFINFO_FLAGS_RUN_ON_EMT BIT(0)
-+#define DBGFINFO_FLAGS_RUN_ON_EMT RT_BIT(0)
- /** @} */
-
-
-@@ -1320,14 +1320,14 @@ typedef struct DBGFSTACKFRAME
- * @{ */
- /** Set if the content of the frame is filled in by DBGFR3StackWalk() and can be used
- * to construct the next frame. */
--#define DBGFSTACKFRAME_FLAGS_ALL_VALID BIT(0)
-+#define DBGFSTACKFRAME_FLAGS_ALL_VALID RT_BIT(0)
- /** This is the last stack frame we can read.
- * This flag is not set if the walk stop because of max dept or recursion. */
--#define DBGFSTACKFRAME_FLAGS_LAST BIT(1)
-+#define DBGFSTACKFRAME_FLAGS_LAST RT_BIT(1)
- /** This is the last record because we detected a loop. */
--#define DBGFSTACKFRAME_FLAGS_LOOP BIT(2)
-+#define DBGFSTACKFRAME_FLAGS_LOOP RT_BIT(2)
- /** This is the last record because we reached the maximum depth. */
--#define DBGFSTACKFRAME_FLAGS_MAX_DEPTH BIT(3)
-+#define DBGFSTACKFRAME_FLAGS_MAX_DEPTH RT_BIT(3)
- /** @} */
-
- /**
-@@ -1391,17 +1391,17 @@ DBGFR3DECL(void) DBGFR3StackWalkEnd(PVM
- /** Flags to pass to DBGFR3DisasInstrEx().
- * @{ */
- /** Disassemble the current guest instruction, with annotations. */
--#define DBGF_DISAS_FLAGS_CURRENT_GUEST BIT(0)
-+#define DBGF_DISAS_FLAGS_CURRENT_GUEST RT_BIT(0)
- /** Disassemble the current hypervisor instruction, with annotations. */
--#define DBGF_DISAS_FLAGS_CURRENT_HYPER BIT(1)
-+#define DBGF_DISAS_FLAGS_CURRENT_HYPER RT_BIT(1)
- /** No annotations for current context. */
--#define DBGF_DISAS_FLAGS_NO_ANNOTATION BIT(2)
-+#define DBGF_DISAS_FLAGS_NO_ANNOTATION RT_BIT(2)
- /** No symbol lookup. */
--#define DBGF_DISAS_FLAGS_NO_SYMBOLS BIT(3)
-+#define DBGF_DISAS_FLAGS_NO_SYMBOLS RT_BIT(3)
- /** No instruction bytes. */
--#define DBGF_DISAS_FLAGS_NO_BYTES BIT(4)
-+#define DBGF_DISAS_FLAGS_NO_BYTES RT_BIT(4)
- /** No address in the output. */
--#define DBGF_DISAS_FLAGS_NO_ADDRESS BIT(5)
-+#define DBGF_DISAS_FLAGS_NO_ADDRESS RT_BIT(5)
- /** @} */
-
- /** Special flat selector. */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/dis.h virtualbox-ose-1.5.2-dfsg2/include/VBox/dis.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/dis.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/dis.h 2007-12-18 14:54:48.000000000 +0000
-@@ -57,63 +57,63 @@ __BEGIN_DECLS
- /**
- * Operand type.
- */
--#define OPTYPE_INVALID BIT(0)
--#define OPTYPE_HARMLESS BIT(1)
--#define OPTYPE_CONTROLFLOW BIT(2)
--#define OPTYPE_POTENTIALLY_DANGEROUS BIT(3)
--#define OPTYPE_DANGEROUS BIT(4)
--#define OPTYPE_PORTIO BIT(5)
--#define OPTYPE_PRIVILEGED BIT(6)
--#define OPTYPE_PRIVILEGED_NOTRAP BIT(7)
--#define OPTYPE_UNCOND_CONTROLFLOW BIT(8)
--#define OPTYPE_RELATIVE_CONTROLFLOW BIT(9)
--#define OPTYPE_COND_CONTROLFLOW BIT(10)
--#define OPTYPE_INTERRUPT BIT(11)
--#define OPTYPE_ILLEGAL BIT(12)
--#define OPTYPE_RRM_DANGEROUS BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */
--#define OPTYPE_RRM_DANGEROUS_16 BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */
-+#define OPTYPE_INVALID RT_BIT(0)
-+#define OPTYPE_HARMLESS RT_BIT(1)
-+#define OPTYPE_CONTROLFLOW RT_BIT(2)
-+#define OPTYPE_POTENTIALLY_DANGEROUS RT_BIT(3)
-+#define OPTYPE_DANGEROUS RT_BIT(4)
-+#define OPTYPE_PORTIO RT_BIT(5)
-+#define OPTYPE_PRIVILEGED RT_BIT(6)
-+#define OPTYPE_PRIVILEGED_NOTRAP RT_BIT(7)
-+#define OPTYPE_UNCOND_CONTROLFLOW RT_BIT(8)
-+#define OPTYPE_RELATIVE_CONTROLFLOW RT_BIT(9)
-+#define OPTYPE_COND_CONTROLFLOW RT_BIT(10)
-+#define OPTYPE_INTERRUPT RT_BIT(11)
-+#define OPTYPE_ILLEGAL RT_BIT(12)
-+#define OPTYPE_RRM_DANGEROUS RT_BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */
-+#define OPTYPE_RRM_DANGEROUS_16 RT_BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */
- #define OPTYPE_RRM_MASK (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16)
--#define OPTYPE_INHIBIT_IRQS BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
--#define OPTYPE_PORTIO_READ BIT(17)
--#define OPTYPE_PORTIO_WRITE BIT(18)
-+#define OPTYPE_INHIBIT_IRQS RT_BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
-+#define OPTYPE_PORTIO_READ RT_BIT(17)
-+#define OPTYPE_PORTIO_WRITE RT_BIT(18)
- #define OPTYPE_ALL (0xffffffff)
-
- /** Parameter usage flags.
- * @{
- */
--#define USE_BASE BIT(0)
--#define USE_INDEX BIT(1)
--#define USE_SCALE BIT(2)
--#define USE_REG_GEN8 BIT(3)
--#define USE_REG_GEN16 BIT(4)
--#define USE_REG_GEN32 BIT(5)
--#define USE_REG_FP BIT(6)
--#define USE_REG_MMX BIT(7)
--#define USE_REG_XMM BIT(8)
--#define USE_REG_CR BIT(9)
--#define USE_REG_DBG BIT(10)
--#define USE_REG_SEG BIT(11)
--#define USE_REG_TEST BIT(12)
--#define USE_DISPLACEMENT8 BIT(13)
--#define USE_DISPLACEMENT16 BIT(14)
--#define USE_DISPLACEMENT32 BIT(15)
--#define USE_IMMEDIATE8 BIT(16)
--#define USE_IMMEDIATE8_REL BIT(17)
--#define USE_IMMEDIATE16 BIT(18)
--#define USE_IMMEDIATE16_REL BIT(19)
--#define USE_IMMEDIATE32 BIT(20)
--#define USE_IMMEDIATE32_REL BIT(21)
--#define USE_IMMEDIATE64 BIT(22)
--#define USE_IMMEDIATE_ADDR_0_32 BIT(23)
--#define USE_IMMEDIATE_ADDR_16_32 BIT(24)
--#define USE_IMMEDIATE_ADDR_0_16 BIT(25)
--#define USE_IMMEDIATE_ADDR_16_16 BIT(26)
-+#define USE_BASE RT_BIT(0)
-+#define USE_INDEX RT_BIT(1)
-+#define USE_SCALE RT_BIT(2)
-+#define USE_REG_GEN8 RT_BIT(3)
-+#define USE_REG_GEN16 RT_BIT(4)
-+#define USE_REG_GEN32 RT_BIT(5)
-+#define USE_REG_FP RT_BIT(6)
-+#define USE_REG_MMX RT_BIT(7)
-+#define USE_REG_XMM RT_BIT(8)
-+#define USE_REG_CR RT_BIT(9)
-+#define USE_REG_DBG RT_BIT(10)
-+#define USE_REG_SEG RT_BIT(11)
-+#define USE_REG_TEST RT_BIT(12)
-+#define USE_DISPLACEMENT8 RT_BIT(13)
-+#define USE_DISPLACEMENT16 RT_BIT(14)
-+#define USE_DISPLACEMENT32 RT_BIT(15)
-+#define USE_IMMEDIATE8 RT_BIT(16)
-+#define USE_IMMEDIATE8_REL RT_BIT(17)
-+#define USE_IMMEDIATE16 RT_BIT(18)
-+#define USE_IMMEDIATE16_REL RT_BIT(19)
-+#define USE_IMMEDIATE32 RT_BIT(20)
-+#define USE_IMMEDIATE32_REL RT_BIT(21)
-+#define USE_IMMEDIATE64 RT_BIT(22)
-+#define USE_IMMEDIATE_ADDR_0_32 RT_BIT(23)
-+#define USE_IMMEDIATE_ADDR_16_32 RT_BIT(24)
-+#define USE_IMMEDIATE_ADDR_0_16 RT_BIT(25)
-+#define USE_IMMEDIATE_ADDR_16_16 RT_BIT(26)
- /** DS:ESI */
--#define USE_POINTER_DS_BASED BIT(27)
-+#define USE_POINTER_DS_BASED RT_BIT(27)
- /** ES:EDI */
--#define USE_POINTER_ES_BASED BIT(28)
--#define USE_IMMEDIATE16_SX8 BIT(29)
--#define USE_IMMEDIATE32_SX8 BIT(30)
-+#define USE_POINTER_ES_BASED RT_BIT(28)
-+#define USE_IMMEDIATE16_SX8 RT_BIT(29)
-+#define USE_IMMEDIATE32_SX8 RT_BIT(30)
-
- #define USE_IMMEDIATE (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8)
-
-@@ -213,12 +213,12 @@ __BEGIN_DECLS
- /** Used by DISQueryParamVal & EMIQueryParamVal
- * @{
- */
--#define PARAM_VAL8 BIT(0)
--#define PARAM_VAL16 BIT(1)
--#define PARAM_VAL32 BIT(2)
--#define PARAM_VAL64 BIT(3)
--#define PARAM_VALFARPTR16 BIT(4)
--#define PARAM_VALFARPTR32 BIT(5)
-+#define PARAM_VAL8 RT_BIT(0)
-+#define PARAM_VAL16 RT_BIT(1)
-+#define PARAM_VAL32 RT_BIT(2)
-+#define PARAM_VAL64 RT_BIT(3)
-+#define PARAM_VALFARPTR16 RT_BIT(4)
-+#define PARAM_VALFARPTR32 RT_BIT(5)
-
- #define PARMTYPE_REGISTER 1
- #define PARMTYPE_ADDRESS 2
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/hwacc_svm.h virtualbox-ose-1.5.2-dfsg2/include/VBox/hwacc_svm.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/hwacc_svm.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/hwacc_svm.h 2007-12-18 14:54:48.000000000 +0000
-@@ -229,69 +229,69 @@
- * @{
- */
- /* 0 Intercept INTR (physical maskable interrupt) */
--#define SVM_CTRL1_INTERCEPT_INTR BIT(0)
-+#define SVM_CTRL1_INTERCEPT_INTR RT_BIT(0)
- /* 1 Intercept NMI */
--#define SVM_CTRL1_INTERCEPT_NMI BIT(1)
-+#define SVM_CTRL1_INTERCEPT_NMI RT_BIT(1)
- /* 2 Intercept SMI */
--#define SVM_CTRL1_INTERCEPT_SMI BIT(2)
-+#define SVM_CTRL1_INTERCEPT_SMI RT_BIT(2)
- /* 3 Intercept INIT */
--#define SVM_CTRL1_INTERCEPT_INIT BIT(3)
-+#define SVM_CTRL1_INTERCEPT_INIT RT_BIT(3)
- /* 4 Intercept VINTR (virtual maskable interrupt) */
--#define SVM_CTRL1_INTERCEPT_VINTR BIT(4)
-+#define SVM_CTRL1_INTERCEPT_VINTR RT_BIT(4)
- /* 5 Intercept CR0 writes that change bits other than CR0.TS or CR0.MP */
--#define SVM_CTRL1_INTERCEPT_CR0 BIT(5)
-+#define SVM_CTRL1_INTERCEPT_CR0 RT_BIT(5)
- /* 6 Intercept reads of IDTR */
--#define SVM_CTRL1_INTERCEPT_IDTR_READS BIT(6)
-+#define SVM_CTRL1_INTERCEPT_IDTR_READS RT_BIT(6)
- /* 7 Intercept reads of GDTR */
--#define SVM_CTRL1_INTERCEPT_GDTR_READS BIT(7)
-+#define SVM_CTRL1_INTERCEPT_GDTR_READS RT_BIT(7)
- /* 8 Intercept reads of LDTR */
--#define SVM_CTRL1_INTERCEPT_LDTR_READS BIT(8)
-+#define SVM_CTRL1_INTERCEPT_LDTR_READS RT_BIT(8)
- /* 9 Intercept reads of TR */
--#define SVM_CTRL1_INTERCEPT_TR_READS BIT(9)
-+#define SVM_CTRL1_INTERCEPT_TR_READS RT_BIT(9)
- /* 10 Intercept writes of IDTR */
--#define SVM_CTRL1_INTERCEPT_IDTR_WRITES BIT(10)
-+#define SVM_CTRL1_INTERCEPT_IDTR_WRITES RT_BIT(10)
- /* 11 Intercept writes of GDTR */
--#define SVM_CTRL1_INTERCEPT_GDTR_WRITES BIT(11)
-+#define SVM_CTRL1_INTERCEPT_GDTR_WRITES RT_BIT(11)
- /* 12 Intercept writes of LDTR */
--#define SVM_CTRL1_INTERCEPT_LDTR_WRITES BIT(12)
-+#define SVM_CTRL1_INTERCEPT_LDTR_WRITES RT_BIT(12)
- /* 13 Intercept writes of TR */
--#define SVM_CTRL1_INTERCEPT_TR_WRITES BIT(13)
-+#define SVM_CTRL1_INTERCEPT_TR_WRITES RT_BIT(13)
- /* 14 Intercept RDTSC instruction */
--#define SVM_CTRL1_INTERCEPT_RDTSC BIT(14)
-+#define SVM_CTRL1_INTERCEPT_RDTSC RT_BIT(14)
- /* 15 Intercept RDPMC instruction */
--#define SVM_CTRL1_INTERCEPT_RDPMC BIT(15)
-+#define SVM_CTRL1_INTERCEPT_RDPMC RT_BIT(15)
- /* 16 Intercept PUSHF instruction */
--#define SVM_CTRL1_INTERCEPT_PUSHF BIT(16)
-+#define SVM_CTRL1_INTERCEPT_PUSHF RT_BIT(16)
- /* 17 Intercept POPF instruction */
--#define SVM_CTRL1_INTERCEPT_POPF BIT(17)
-+#define SVM_CTRL1_INTERCEPT_POPF RT_BIT(17)
- /* 18 Intercept CPUID instruction */
--#define SVM_CTRL1_INTERCEPT_CPUID BIT(18)
-+#define SVM_CTRL1_INTERCEPT_CPUID RT_BIT(18)
- /* 19 Intercept RSM instruction */
--#define SVM_CTRL1_INTERCEPT_RSM BIT(19)
-+#define SVM_CTRL1_INTERCEPT_RSM RT_BIT(19)
- /* 20 Intercept IRET instruction */
--#define SVM_CTRL1_INTERCEPT_IRET BIT(20)
-+#define SVM_CTRL1_INTERCEPT_IRET RT_BIT(20)
- /* 21 Intercept INTn instruction */
--#define SVM_CTRL1_INTERCEPT_INTN BIT(21)
-+#define SVM_CTRL1_INTERCEPT_INTN RT_BIT(21)
- /* 22 Intercept INVD instruction */
--#define SVM_CTRL1_INTERCEPT_INVD BIT(22)
-+#define SVM_CTRL1_INTERCEPT_INVD RT_BIT(22)
- /* 23 Intercept PAUSE instruction */
--#define SVM_CTRL1_INTERCEPT_PAUSE BIT(23)
-+#define SVM_CTRL1_INTERCEPT_PAUSE RT_BIT(23)
- /* 24 Intercept HLT instruction */
--#define SVM_CTRL1_INTERCEPT_HLT BIT(24)
-+#define SVM_CTRL1_INTERCEPT_HLT RT_BIT(24)
- /* 25 Intercept INVLPG instruction */
--#define SVM_CTRL1_INTERCEPT_INVLPG BIT(25)
-+#define SVM_CTRL1_INTERCEPT_INVLPG RT_BIT(25)
- /* 26 Intercept INVLPGA instruction */
--#define SVM_CTRL1_INTERCEPT_INVLPGA BIT(26)
-+#define SVM_CTRL1_INTERCEPT_INVLPGA RT_BIT(26)
- /* 27 IOIO_PROT Intercept IN/OUT accesses to selected ports. */
--#define SVM_CTRL1_INTERCEPT_INOUT_BITMAP BIT(27)
-+#define SVM_CTRL1_INTERCEPT_INOUT_BITMAP RT_BIT(27)
- /* 28 MSR_PROT Intercept RDMSR or WRMSR accesses to selected MSRs. */
--#define SVM_CTRL1_INTERCEPT_MSR_SHADOW BIT(28)
-+#define SVM_CTRL1_INTERCEPT_MSR_SHADOW RT_BIT(28)
- /* 29 Intercept task switches. */
--#define SVM_CTRL1_INTERCEPT_TASK_SWITCH BIT(29)
-+#define SVM_CTRL1_INTERCEPT_TASK_SWITCH RT_BIT(29)
- /* 30 FERR_FREEZE: intercept processor "freezing" during legacy FERR handling. */
--#define SVM_CTRL1_INTERCEPT_FERR_FREEZE BIT(30)
-+#define SVM_CTRL1_INTERCEPT_FERR_FREEZE RT_BIT(30)
- /* 31 Intercept shutdown events. */
--#define SVM_CTRL1_INTERCEPT_SHUTDOWN BIT(31)
-+#define SVM_CTRL1_INTERCEPT_SHUTDOWN RT_BIT(31)
- /** @} */
-
-
-@@ -299,37 +299,37 @@
- * @{
- */
- /* 0 Intercept VMRUN instruction */
--#define SVM_CTRL2_INTERCEPT_VMRUN BIT(0)
-+#define SVM_CTRL2_INTERCEPT_VMRUN RT_BIT(0)
- /* 1 Intercept VMMCALL instruction */
--#define SVM_CTRL2_INTERCEPT_VMMCALL BIT(1)
-+#define SVM_CTRL2_INTERCEPT_VMMCALL RT_BIT(1)
- /* 2 Intercept VMLOAD instruction */
--#define SVM_CTRL2_INTERCEPT_VMLOAD BIT(2)
-+#define SVM_CTRL2_INTERCEPT_VMLOAD RT_BIT(2)
- /* 3 Intercept VMSAVE instruction */
--#define SVM_CTRL2_INTERCEPT_VMSAVE BIT(3)
-+#define SVM_CTRL2_INTERCEPT_VMSAVE RT_BIT(3)
- /* 4 Intercept STGI instruction */
--#define SVM_CTRL2_INTERCEPT_STGI BIT(4)
-+#define SVM_CTRL2_INTERCEPT_STGI RT_BIT(4)
- /* 5 Intercept CLGI instruction */
--#define SVM_CTRL2_INTERCEPT_CLGI BIT(5)
-+#define SVM_CTRL2_INTERCEPT_CLGI RT_BIT(5)
- /* 6 Intercept SKINIT instruction */
--#define SVM_CTRL2_INTERCEPT_SKINIT BIT(6)
-+#define SVM_CTRL2_INTERCEPT_SKINIT RT_BIT(6)
- /* 7 Intercept RDTSCP instruction */
--#define SVM_CTRL2_INTERCEPT_RDTSCP BIT(7)
-+#define SVM_CTRL2_INTERCEPT_RDTSCP RT_BIT(7)
- /* 8 Intercept ICEBP instruction */
--#define SVM_CTRL2_INTERCEPT_ICEBP BIT(8)
-+#define SVM_CTRL2_INTERCEPT_ICEBP RT_BIT(8)
- /* 9 Intercept WBINVD instruction */
--#define SVM_CTRL2_INTERCEPT_WBINVD BIT(9)
-+#define SVM_CTRL2_INTERCEPT_WBINVD RT_BIT(9)
- /** @} */
-
- /** @name SVM_VMCB.ctrl.u64NestedPaging
- * @{
- */
--#define SVM_NESTED_PAGING_ENABLE BIT(0)
-+#define SVM_NESTED_PAGING_ENABLE RT_BIT(0)
- /** @} */
-
- /** @name SVM_VMCB.ctrl.u64IntShadow
- * @{
- */
--#define SVM_INTERRUPT_SHADOW_ACTIVE BIT(0)
-+#define SVM_INTERRUPT_SHADOW_ACTIVE RT_BIT(0)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/hwacc_vmx.h virtualbox-ose-1.5.2-dfsg2/include/VBox/hwacc_vmx.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/hwacc_vmx.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/hwacc_vmx.h 2007-12-18 14:54:48.000000000 +0000
-@@ -321,9 +321,9 @@
- * @{
- */
- /* External interrupts cause VM exits if set; otherwise dispatched through the guest's IDT. */
--#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_EXT_INT_EXIT BIT(0)
-+#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_EXT_INT_EXIT RT_BIT(0)
- /* Non-maskable interrupts cause VM exits if set; otherwise dispatched through the guest's IDT. */
--#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_NMI_EXIT BIT(3)
-+#define VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_NMI_EXIT RT_BIT(3)
- /* All other bits are reserved and must be set according to MSR IA32_VMX_PROCBASED_CTLS. */
- /** @} */
-
-@@ -332,37 +332,37 @@
- * @{
- */
- /* VM Exit as soon as RFLAGS.IF=1 and no blocking is active. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT BIT(2)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT RT_BIT(2)
- /* Use timestamp counter offset. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_TSC_OFFSET BIT(3)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_TSC_OFFSET RT_BIT(3)
- /* VM Exit when executing the HLT instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT BIT(7)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT RT_BIT(7)
- /* VM Exit when executing the INVLPG instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT BIT(9)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT RT_BIT(9)
- /* VM Exit when executing the MWAIT instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MWAIT_EXIT BIT(10)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MWAIT_EXIT RT_BIT(10)
- /* VM Exit when executing the RDPMC instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDPMC_EXIT BIT(11)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDPMC_EXIT RT_BIT(11)
- /* VM Exit when executing the RDTSC instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT BIT(12)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT RT_BIT(12)
- /* VM Exit on CR8 loads. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_LOAD_EXIT BIT(19)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_LOAD_EXIT RT_BIT(19)
- /* VM Exit on CR8 stores. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT BIT(20)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT RT_BIT(20)
- /* Use TPR shadow. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW BIT(21)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW RT_BIT(21)
- /* VM Exit when executing a MOV DRx instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT BIT(23)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT RT_BIT(23)
- /* VM Exit when executing IO instructions. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_UNCOND_IO_EXIT BIT(24)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_UNCOND_IO_EXIT RT_BIT(24)
- /* Use IO bitmaps. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_IO_BITMAPS BIT(25)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_IO_BITMAPS RT_BIT(25)
- /* Use MSR bitmaps. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS BIT(28)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS RT_BIT(28)
- /* VM Exit when executing the MONITOR instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_EXIT BIT(29)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_EXIT RT_BIT(29)
- /* VM Exit when executing the PAUSE instruction. */
--#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT BIT(30)
-+#define VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT RT_BIT(30)
- /** @} */
-
-
-@@ -370,11 +370,11 @@
- * @{
- */
- /** 64 bits guest mode. Must be 0 for CPUs that don't support AMD64. */
--#define VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE BIT(9)
-+#define VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE RT_BIT(9)
- /** In SMM mode after VM-entry. */
--#define VMX_VMCS_CTRL_ENTRY_CONTROLS_ENTRY_SMM BIT(10)
-+#define VMX_VMCS_CTRL_ENTRY_CONTROLS_ENTRY_SMM RT_BIT(10)
- /** Disable dual treatment of SMI and SMM; must be zero for VM-entry outside of SMM. */
--#define VMX_VMCS_CTRL_ENTRY_CONTROLS_DEACTIVATE_DUALMON BIT(11)
-+#define VMX_VMCS_CTRL_ENTRY_CONTROLS_DEACTIVATE_DUALMON RT_BIT(11)
- /** @} */
-
-
-@@ -382,9 +382,9 @@
- * @{
- */
- /** Return to long mode after a VM-exit. */
--#define VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64 BIT(9)
-+#define VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64 RT_BIT(9)
- /** Acknowledge external interrupts with the irq controller if one caused a VM-exit. */
--#define VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ BIT(15)
-+#define VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ RT_BIT(15)
- /** @} */
-
- /** 32 Bits read-only fields
-@@ -406,13 +406,13 @@
- #define VMX_EXIT_INTERRUPTION_INFO_VECTOR(a) (a & 0xff)
- #define VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT 8
- #define VMX_EXIT_INTERRUPTION_INFO_TYPE(a) ((a >> VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT) & 7)
--#define VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID BIT(11)
-+#define VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID RT_BIT(11)
- #define VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(a) (a & VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID)
--#define VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(a) (a & BIT(12))
-+#define VMX_EXIT_INTERRUPTION_INFO_NMI_UNBLOCK(a) (a & RT_BIT(12))
- #define VMX_EXIT_INTERRUPTION_INFO_VALID_SHIFT 31
--#define VMX_EXIT_INTERRUPTION_INFO_VALID(a) (a & BIT(31))
-+#define VMX_EXIT_INTERRUPTION_INFO_VALID(a) (a & RT_BIT(31))
- /* Construct an irq event injection value from the exit interruption info value (same except that bit 12 is reserved). */
--#define VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(a) (a & ~BIT(12))
-+#define VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(a) (a & ~RT_BIT(12))
- /** @} */
-
- /** VMX_VMCS_RO_EXIT_INTERRUPTION_INFO_TYPE
-@@ -470,10 +470,10 @@
- /** VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE
- * @{
- */
--#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI BIT(0)
--#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS BIT(1)
--#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI BIT(2)
--#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI BIT(3)
-+#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI RT_BIT(0)
-+#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS RT_BIT(1)
-+#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI RT_BIT(2)
-+#define VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI RT_BIT(3)
- /** @} */
-
-
-@@ -635,17 +635,17 @@
- * @{
- */
- /* Hardware breakpoint 0 was met. */
--#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B0 BIT(0)
-+#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B0 RT_BIT(0)
- /* Hardware breakpoint 1 was met. */
--#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B1 BIT(1)
-+#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B1 RT_BIT(1)
- /* Hardware breakpoint 2 was met. */
--#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B2 BIT(2)
-+#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B2 RT_BIT(2)
- /* Hardware breakpoint 3 was met. */
--#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B3 BIT(3)
-+#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_B3 RT_BIT(3)
- /* At least one data or IO breakpoint was hit. */
--#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BREAKPOINT_ENABLED BIT(12)
-+#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BREAKPOINT_ENABLED RT_BIT(12)
- /* A debug exception would have been triggered by single-step execution mode. */
--#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS BIT(14)
-+#define VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS RT_BIT(14)
- /* Bits 4-11, 13 and 15-63 are reserved. */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/mm.h virtualbox-ose-1.5.2-dfsg2/include/VBox/mm.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/mm.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/mm.h 2007-12-18 14:54:48.000000000 +0000
-@@ -46,7 +46,7 @@ __BEGIN_DECLS
- * @remarks The current implementation will always reserve backing
- * memory for reserved ranges to simplify things.
- */
--#define MM_RAM_FLAGS_RESERVED BIT(0)
-+#define MM_RAM_FLAGS_RESERVED RT_BIT(0)
- /** ROM - Read Only Memory.
- * The page have a HC physical address which contains the BIOS code. All write
- * access is trapped and ignored.
-@@ -54,35 +54,35 @@ __BEGIN_DECLS
- * HACK: Writable shadow ROM is indicated by both ROM and MMIO2 being
- * set. (We're out of bits.)
- */
--#define MM_RAM_FLAGS_ROM BIT(1)
-+#define MM_RAM_FLAGS_ROM RT_BIT(1)
- /** MMIO - Memory Mapped I/O.
- * All access is trapped and emulated. No physical backing is required, but
- * might for various reasons be present.
- */
--#define MM_RAM_FLAGS_MMIO BIT(2)
-+#define MM_RAM_FLAGS_MMIO RT_BIT(2)
- /** MMIO2 - Memory Mapped I/O, variation 2.
- * The virtualization is performed using real memory and only catching
- * a few accesses for like keeping track for dirty pages.
- * @remark Involved in the shadow ROM hack.
- */
--#define MM_RAM_FLAGS_MMIO2 BIT(3)
-+#define MM_RAM_FLAGS_MMIO2 RT_BIT(3)
-
- /** PGM has virtual page access handler(s) defined for pages with this flag. */
--#define MM_RAM_FLAGS_VIRTUAL_HANDLER BIT(4)
-+#define MM_RAM_FLAGS_VIRTUAL_HANDLER RT_BIT(4)
- /** PGM has virtual page access handler(s) for write access. */
--#define MM_RAM_FLAGS_VIRTUAL_WRITE BIT(5)
-+#define MM_RAM_FLAGS_VIRTUAL_WRITE RT_BIT(5)
- /** PGM has virtual page access handler(s) for all access. */
--#define MM_RAM_FLAGS_VIRTUAL_ALL BIT(6)
-+#define MM_RAM_FLAGS_VIRTUAL_ALL RT_BIT(6)
- /** PGM has physical page access handler(s) defined for pages with this flag. */
--#define MM_RAM_FLAGS_PHYSICAL_HANDLER BIT(7)
-+#define MM_RAM_FLAGS_PHYSICAL_HANDLER RT_BIT(7)
- /** PGM has physical page access handler(s) for write access. */
--#define MM_RAM_FLAGS_PHYSICAL_WRITE BIT(8)
-+#define MM_RAM_FLAGS_PHYSICAL_WRITE RT_BIT(8)
- /** PGM has physical page access handler(s) for all access. */
--#define MM_RAM_FLAGS_PHYSICAL_ALL BIT(9)
-+#define MM_RAM_FLAGS_PHYSICAL_ALL RT_BIT(9)
- /** PGM has physical page access handler(s) for this page and has temporarily disabled it. */
--#define MM_RAM_FLAGS_PHYSICAL_TEMP_OFF BIT(10)
-+#define MM_RAM_FLAGS_PHYSICAL_TEMP_OFF RT_BIT(10)
- /** Physical backing memory is allocated dynamically. Not set implies a one time static allocation. */
--#define MM_RAM_FLAGS_DYNAMIC_ALLOC BIT(11)
-+#define MM_RAM_FLAGS_DYNAMIC_ALLOC RT_BIT(11)
-
- /** The shift used to get the reference count. */
- #define MM_RAM_FLAGS_CREFS_SHIFT 62
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/patm.h virtualbox-ose-1.5.2-dfsg2/include/VBox/patm.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/patm.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/patm.h 2007-12-18 14:54:48.000000000 +0000
-@@ -34,18 +34,18 @@ __BEGIN_DECLS
- * Flags for specifying the type of patch to install with PATMR3InstallPatch
- * @{
- */
--#define PATMFL_CODE32 BIT64(0)
--#define PATMFL_INTHANDLER BIT64(1)
--#define PATMFL_SYSENTER BIT64(2)
--#define PATMFL_GUEST_SPECIFIC BIT64(3)
--#define PATMFL_USER_MODE BIT64(4)
--#define PATMFL_IDTHANDLER BIT64(5)
--#define PATMFL_TRAPHANDLER BIT64(6)
--#define PATMFL_DUPLICATE_FUNCTION BIT64(7)
--#define PATMFL_REPLACE_FUNCTION_CALL BIT64(8)
--#define PATMFL_TRAPHANDLER_WITH_ERRORCODE BIT64(9)
-+#define PATMFL_CODE32 RT_BIT_64(0)
-+#define PATMFL_INTHANDLER RT_BIT_64(1)
-+#define PATMFL_SYSENTER RT_BIT_64(2)
-+#define PATMFL_GUEST_SPECIFIC RT_BIT_64(3)
-+#define PATMFL_USER_MODE RT_BIT_64(4)
-+#define PATMFL_IDTHANDLER RT_BIT_64(5)
-+#define PATMFL_TRAPHANDLER RT_BIT_64(6)
-+#define PATMFL_DUPLICATE_FUNCTION RT_BIT_64(7)
-+#define PATMFL_REPLACE_FUNCTION_CALL RT_BIT_64(8)
-+#define PATMFL_TRAPHANDLER_WITH_ERRORCODE RT_BIT_64(9)
- #define PATMFL_INTHANDLER_WITH_ERRORCODE (PATMFL_TRAPHANDLER_WITH_ERRORCODE)
--#define PATMFL_MMIO_ACCESS BIT64(10)
-+#define PATMFL_MMIO_ACCESS RT_BIT_64(10)
- /* no more room -> change PATMInternal.h if more is needed!! */
-
- /*
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/pdmdev.h virtualbox-ose-1.5.2-dfsg2/include/VBox/pdmdev.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/pdmdev.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/pdmdev.h 2007-12-18 14:54:48.000000000 +0000
-@@ -331,43 +331,43 @@ typedef PDMDEVREG const *PCPDMDEVREG;
- * The order is important, lower bit earlier instantiation.
- * @{ */
- /** Architecture device. */
--#define PDM_DEVREG_CLASS_ARCH BIT(0)
-+#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
- /** Architecture BIOS device. */
--#define PDM_DEVREG_CLASS_ARCH_BIOS BIT(1)
-+#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
- /** PCI bus brigde. */
--#define PDM_DEVREG_CLASS_BUS_PCI BIT(2)
-+#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
- /** ISA bus brigde. */
--#define PDM_DEVREG_CLASS_BUS_ISA BIT(3)
-+#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
- /** Input device (mouse, keyboard, joystick,..). */
--#define PDM_DEVREG_CLASS_INPUT BIT(4)
-+#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
- /** Interrupt controller (PIC). */
--#define PDM_DEVREG_CLASS_PIC BIT(5)
-+#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
- /** Interval controoler (PIT). */
--#define PDM_DEVREG_CLASS_PIT BIT(6)
-+#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
- /** RTC/CMOS. */
--#define PDM_DEVREG_CLASS_RTC BIT(7)
-+#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
- /** DMA controller. */
--#define PDM_DEVREG_CLASS_DMA BIT(8)
-+#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
- /** VMM Device. */
--#define PDM_DEVREG_CLASS_VMM_DEV BIT(9)
-+#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
- /** Graphics device, like VGA. */
--#define PDM_DEVREG_CLASS_GRAPHICS BIT(10)
-+#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
- /** Storage controller device. */
--#define PDM_DEVREG_CLASS_STORAGE BIT(11)
-+#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
- /** Network interface controller. */
--#define PDM_DEVREG_CLASS_NETWORK BIT(12)
-+#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
- /** Audio. */
--#define PDM_DEVREG_CLASS_AUDIO BIT(13)
-+#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
- /** USB HIC. */
--#define PDM_DEVREG_CLASS_BUS_USB BIT(14)
-+#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
- /** ACPI. */
--#define PDM_DEVREG_CLASS_ACPI BIT(15)
-+#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
- /** Serial controller device. */
--#define PDM_DEVREG_CLASS_SERIAL BIT(16)
-+#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
- /** Parallel controller device */
--#define PDM_DEVREG_CLASS_PARALLEL BIT(17)
-+#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
- /** Misc devices (always last). */
--#define PDM_DEVREG_CLASS_MISC BIT(31)
-+#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
- /** @} */
-
-
-@@ -375,11 +375,11 @@ typedef PDMDEVREG const *PCPDMDEVREG;
- * @{
- */
- /** Assert the IRQ (can assume value 1). */
--#define PDM_IRQ_LEVEL_HIGH BIT(0)
-+#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
- /** Deassert the IRQ (can assume value 0). */
- #define PDM_IRQ_LEVEL_LOW 0
- /** flip-flop - assert and then deassert it again immediately. */
--#define PDM_IRQ_LEVEL_FLIP_FLOP (BIT(1) | PDM_IRQ_LEVEL_HIGH)
-+#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/pdmdrv.h virtualbox-ose-1.5.2-dfsg2/include/VBox/pdmdrv.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/pdmdrv.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/pdmdrv.h 2007-12-18 14:54:48.000000000 +0000
-@@ -221,35 +221,35 @@ typedef PDMDRVREG const *PCPDMDRVREG;
- /** PDM Driver Classes.
- * @{ */
- /** Mouse input driver. */
--#define PDM_DRVREG_CLASS_MOUSE BIT(0)
-+#define PDM_DRVREG_CLASS_MOUSE RT_BIT(0)
- /** Keyboard input driver. */
--#define PDM_DRVREG_CLASS_KEYBOARD BIT(1)
-+#define PDM_DRVREG_CLASS_KEYBOARD RT_BIT(1)
- /** Display driver. */
--#define PDM_DRVREG_CLASS_DISPLAY BIT(2)
-+#define PDM_DRVREG_CLASS_DISPLAY RT_BIT(2)
- /** Network transport driver. */
--#define PDM_DRVREG_CLASS_NETWORK BIT(3)
-+#define PDM_DRVREG_CLASS_NETWORK RT_BIT(3)
- /** Block driver. */
--#define PDM_DRVREG_CLASS_BLOCK BIT(4)
-+#define PDM_DRVREG_CLASS_BLOCK RT_BIT(4)
- /** Media driver. */
--#define PDM_DRVREG_CLASS_MEDIA BIT(5)
-+#define PDM_DRVREG_CLASS_MEDIA RT_BIT(5)
- /** Mountable driver. */
--#define PDM_DRVREG_CLASS_MOUNTABLE BIT(6)
-+#define PDM_DRVREG_CLASS_MOUNTABLE RT_BIT(6)
- /** Audio driver. */
--#define PDM_DRVREG_CLASS_AUDIO BIT(7)
-+#define PDM_DRVREG_CLASS_AUDIO RT_BIT(7)
- /** VMMDev driver. */
--#define PDM_DRVREG_CLASS_VMMDEV BIT(8)
-+#define PDM_DRVREG_CLASS_VMMDEV RT_BIT(8)
- /** Status driver. */
--#define PDM_DRVREG_CLASS_STATUS BIT(9)
-+#define PDM_DRVREG_CLASS_STATUS RT_BIT(9)
- /** ACPI driver. */
--#define PDM_DRVREG_CLASS_ACPI BIT(10)
-+#define PDM_DRVREG_CLASS_ACPI RT_BIT(10)
- /** USB related driver. */
--#define PDM_DRVREG_CLASS_USB BIT(11)
-+#define PDM_DRVREG_CLASS_USB RT_BIT(11)
- /** ISCSI Transport related driver. */
--#define PDM_DRVREG_CLASS_ISCSITRANSPORT BIT(12)
-+#define PDM_DRVREG_CLASS_ISCSITRANSPORT RT_BIT(12)
- /** Char driver. */
--#define PDM_DRVREG_CLASS_CHAR BIT(13)
-+#define PDM_DRVREG_CLASS_CHAR RT_BIT(13)
- /** Stream driver. */
--#define PDM_DRVREG_CLASS_STREAM BIT(14)
-+#define PDM_DRVREG_CLASS_STREAM RT_BIT(14)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/pdmifs.h virtualbox-ose-1.5.2-dfsg2/include/VBox/pdmifs.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/pdmifs.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/pdmifs.h 2007-12-18 14:54:48.000000000 +0000
-@@ -189,9 +189,9 @@ typedef struct PDMIMOUSEPORT
-
- /** Mouse button defines for PDMIMOUSEPORT::pfnPutEvent.
- * @{ */
--#define PDMIMOUSEPORT_BUTTON_LEFT BIT(0)
--#define PDMIMOUSEPORT_BUTTON_RIGHT BIT(1)
--#define PDMIMOUSEPORT_BUTTON_MIDDLE BIT(2)
-+#define PDMIMOUSEPORT_BUTTON_LEFT RT_BIT(0)
-+#define PDMIMOUSEPORT_BUTTON_RIGHT RT_BIT(1)
-+#define PDMIMOUSEPORT_BUTTON_MIDDLE RT_BIT(2)
- /** @} */
-
-
-@@ -1809,13 +1809,13 @@ typedef union PDMLEDCORE
- /** LED bit masks for the u32 view.
- * @{ */
- /** Reading/Receiving indicator. */
--#define PDMLED_READING BIT(0)
-+#define PDMLED_READING RT_BIT(0)
- /** Writing/Sending indicator. */
--#define PDMLED_WRITING BIT(1)
-+#define PDMLED_WRITING RT_BIT(1)
- /** Busy indicator. */
--#define PDMLED_BUSY BIT(2)
-+#define PDMLED_BUSY RT_BIT(2)
- /** Error indicator. */
--#define PDMLED_ERROR BIT(3)
-+#define PDMLED_ERROR RT_BIT(3)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/selm.h virtualbox-ose-1.5.2-dfsg2/include/VBox/selm.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/selm.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/selm.h 2007-12-18 14:54:48.000000000 +0000
-@@ -147,9 +147,9 @@ SELMDECL(RTGCPTR) SELMToFlat(PVM pVM, X8
- /** Flags for SELMToFlatEx().
- * @{ */
- /** Don't check the RPL,DPL or CPL. */
--#define SELMTOFLAT_FLAGS_NO_PL BIT(8)
-+#define SELMTOFLAT_FLAGS_NO_PL RT_BIT(8)
- /** Flags contains CPL information. */
--#define SELMTOFLAT_FLAGS_HAVE_CPL BIT(9)
-+#define SELMTOFLAT_FLAGS_HAVE_CPL RT_BIT(9)
- /** CPL is 3. */
- #define SELMTOFLAT_FLAGS_CPL3 3
- /** CPL is 2. */
-@@ -161,7 +161,7 @@ SELMDECL(RTGCPTR) SELMToFlat(PVM pVM, X8
- /** Get the CPL from the flags. */
- #define SELMTOFLAT_FLAGS_CPL(fFlags) ((fFlags) & X86_SEL_RPL)
- /** Allow converting using Hypervisor GDT entries. */
--#define SELMTOFLAT_FLAGS_HYPER BIT(10)
-+#define SELMTOFLAT_FLAGS_HYPER RT_BIT(10)
- /** @} */
-
- /**
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/vm.h virtualbox-ose-1.5.2-dfsg2/include/VBox/vm.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/vm.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/vm.h 2007-12-18 14:54:48.000000000 +0000
-@@ -42,57 +42,57 @@
- * @{
- */
- /** This action forces the VM to service check and pending interrups on the APIC. */
--#define VM_FF_INTERRUPT_APIC BIT(0)
-+#define VM_FF_INTERRUPT_APIC RT_BIT(0)
- /** This action forces the VM to service check and pending interrups on the PIC. */
--#define VM_FF_INTERRUPT_PIC BIT(1)
-+#define VM_FF_INTERRUPT_PIC RT_BIT(1)
- /** This action forces the VM to schedule and run pending timer (TM). */
--#define VM_FF_TIMER BIT(2)
-+#define VM_FF_TIMER RT_BIT(2)
- /** PDM Queues are pending. */
--#define VM_FF_PDM_QUEUES BIT(3)
-+#define VM_FF_PDM_QUEUES RT_BIT(3)
- /** PDM DMA transfers are pending. */
--#define VM_FF_PDM_DMA BIT(4)
-+#define VM_FF_PDM_DMA RT_BIT(4)
- /** PDM critical section unlocking is pending, process promptly upon return to R3. */
--#define VM_FF_PDM_CRITSECT BIT(5)
-+#define VM_FF_PDM_CRITSECT RT_BIT(5)
-
- /** This action forces the VM to call DBGF so DBGF can service debugger
- * requests in the emulation thread.
- * This action flag stays asserted till DBGF clears it.*/
--#define VM_FF_DBGF BIT(8)
-+#define VM_FF_DBGF RT_BIT(8)
- /** This action forces the VM to service pending requests from other
- * thread or requests which must be executed in another context. */
--#define VM_FF_REQUEST BIT(9)
-+#define VM_FF_REQUEST RT_BIT(9)
- /** Terminate the VM immediately. */
--#define VM_FF_TERMINATE BIT(10)
-+#define VM_FF_TERMINATE RT_BIT(10)
- /** Reset the VM. (postponed) */
--#define VM_FF_RESET BIT(11)
-+#define VM_FF_RESET RT_BIT(11)
-
- /** This action forces the VM to resync the page tables before going
- * back to execute guest code. (GLOBAL FLUSH) */
--#define VM_FF_PGM_SYNC_CR3 BIT(16)
-+#define VM_FF_PGM_SYNC_CR3 RT_BIT(16)
- /** Same as VM_FF_PGM_SYNC_CR3 except that global pages can be skipped.
- * (NON-GLOBAL FLUSH) */
--#define VM_FF_PGM_SYNC_CR3_NON_GLOBAL BIT(17)
-+#define VM_FF_PGM_SYNC_CR3_NON_GLOBAL RT_BIT(17)
- /** Check the interupt and trap gates */
--#define VM_FF_TRPM_SYNC_IDT BIT(18)
-+#define VM_FF_TRPM_SYNC_IDT RT_BIT(18)
- /** Check Guest's TSS ring 0 stack */
--#define VM_FF_SELM_SYNC_TSS BIT(19)
-+#define VM_FF_SELM_SYNC_TSS RT_BIT(19)
- /** Check Guest's GDT table */
--#define VM_FF_SELM_SYNC_GDT BIT(20)
-+#define VM_FF_SELM_SYNC_GDT RT_BIT(20)
- /** Check Guest's LDT table */
--#define VM_FF_SELM_SYNC_LDT BIT(21)
-+#define VM_FF_SELM_SYNC_LDT RT_BIT(21)
- /** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
--#define VM_FF_INHIBIT_INTERRUPTS BIT(22)
-+#define VM_FF_INHIBIT_INTERRUPTS RT_BIT(22)
-
- /** CSAM needs to scan the page that's being executed */
--#define VM_FF_CSAM_SCAN_PAGE BIT(24)
-+#define VM_FF_CSAM_SCAN_PAGE RT_BIT(24)
- /** CSAM needs to do some homework. */
--#define VM_FF_CSAM_PENDING_ACTION BIT(25)
-+#define VM_FF_CSAM_PENDING_ACTION RT_BIT(25)
-
- /** Force return to Ring-3. */
--#define VM_FF_TO_R3 BIT(28)
-+#define VM_FF_TO_R3 RT_BIT(28)
-
- /** Suspend the VM - debug only. */
--#define VM_FF_DEBUG_SUSPEND BIT(31)
-+#define VM_FF_DEBUG_SUSPEND RT_BIT(31)
-
- /** Externally forced actions. Used to quit the idle/wait loop. */
- #define VM_FF_EXTERNAL_SUSPENDED_MASK (VM_FF_TERMINATE | VM_FF_DBGF | VM_FF_REQUEST)
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/vusb.h virtualbox-ose-1.5.2-dfsg2/include/VBox/vusb.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/vusb.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/vusb.h 2007-12-18 14:54:48.000000000 +0000
-@@ -32,9 +32,9 @@ __BEGIN_DECLS
- /** @name USB Standard version flags.
- * @{ */
- /** Indicates USB 1.1 support. */
--#define VUSB_STDVER_11 BIT(1)
-+#define VUSB_STDVER_11 RT_BIT(1)
- /** Indicates USB 2.0 support. */
--#define VUSB_STDVER_20 BIT(2)
-+#define VUSB_STDVER_20 RT_BIT(2)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/x86.h virtualbox-ose-1.5.2-dfsg2/include/VBox/x86.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/x86.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/x86.h 2007-12-18 14:54:48.000000000 +0000
-@@ -115,39 +115,39 @@ typedef const X86EFLAGS *PCX86EFLAGS;
- * @{
- */
- /** Bit 0 - CF - Carry flag - Status flag. */
--#define X86_EFL_CF BIT(0)
-+#define X86_EFL_CF RT_BIT(0)
- /** Bit 2 - PF - Parity flag - Status flag. */
--#define X86_EFL_PF BIT(2)
-+#define X86_EFL_PF RT_BIT(2)
- /** Bit 4 - AF - Auxiliary carry flag - Status flag. */
--#define X86_EFL_AF BIT(4)
-+#define X86_EFL_AF RT_BIT(4)
- /** Bit 6 - ZF - Zero flag - Status flag. */
--#define X86_EFL_ZF BIT(6)
-+#define X86_EFL_ZF RT_BIT(6)
- /** Bit 7 - SF - Signed flag - Status flag. */
--#define X86_EFL_SF BIT(7)
-+#define X86_EFL_SF RT_BIT(7)
- /** Bit 8 - TF - Trap flag - System flag. */
--#define X86_EFL_TF BIT(8)
-+#define X86_EFL_TF RT_BIT(8)
- /** Bit 9 - IF - Interrupt flag - System flag. */
--#define X86_EFL_IF BIT(9)
-+#define X86_EFL_IF RT_BIT(9)
- /** Bit 10 - DF - Direction flag - Control flag. */
--#define X86_EFL_DF BIT(10)
-+#define X86_EFL_DF RT_BIT(10)
- /** Bit 11 - OF - Overflow flag - Status flag. */
--#define X86_EFL_OF BIT(11)
-+#define X86_EFL_OF RT_BIT(11)
- /** Bit 12-13 - IOPL - I/O prvilege level flag - System flag. */
--#define X86_EFL_IOPL (BIT(12) | BIT(13))
-+#define X86_EFL_IOPL (RT_BIT(12) | RT_BIT(13))
- /** Bit 14 - NT - Nested task flag - System flag. */
--#define X86_EFL_NT BIT(14)
-+#define X86_EFL_NT RT_BIT(14)
- /** Bit 16 - RF - Resume flag - System flag. */
--#define X86_EFL_RF BIT(16)
-+#define X86_EFL_RF RT_BIT(16)
- /** Bit 17 - VM - Virtual 8086 mode - System flag. */
--#define X86_EFL_VM BIT(17)
-+#define X86_EFL_VM RT_BIT(17)
- /** Bit 18 - AC - Alignment check flag - System flag. Works with CR0.AM. */
--#define X86_EFL_AC BIT(18)
-+#define X86_EFL_AC RT_BIT(18)
- /** Bit 19 - VIF - Virtual interupt flag - System flag. */
--#define X86_EFL_VIF BIT(19)
-+#define X86_EFL_VIF RT_BIT(19)
- /** Bit 20 - VIP - Virtual interupt pending flag - System flag. */
--#define X86_EFL_VIP BIT(20)
-+#define X86_EFL_VIP RT_BIT(20)
- /** Bit 21 - ID - CPUID flag - System flag. If this responds to flipping CPUID is supported. */
--#define X86_EFL_ID BIT(21)
-+#define X86_EFL_ID RT_BIT(21)
- /** IOPL shift. */
- #define X86_EFL_IOPL_SHIFT 12
- /** The the IOPL level from the flags. */
-@@ -290,87 +290,87 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- * @{
- */
- /** ECX Bit 0 - SSE3 - Supports SSE3 or not. */
--#define X86_CPUID_FEATURE_ECX_SSE3 BIT(0)
-+#define X86_CPUID_FEATURE_ECX_SSE3 RT_BIT(0)
- /** ECX Bit 3 - MONITOR - Supports MONITOR/MWAIT. */
--#define X86_CPUID_FEATURE_ECX_MONITOR BIT(3)
-+#define X86_CPUID_FEATURE_ECX_MONITOR RT_BIT(3)
- /** ECX Bit 4 - CPL-DS - CPL Qualified Debug Store. */
--#define X86_CPUID_FEATURE_ECX_CPLDS BIT(4)
-+#define X86_CPUID_FEATURE_ECX_CPLDS RT_BIT(4)
- /** ECX Bit 5 - VMX - Virtual Machine Technology. */
--#define X86_CPUID_FEATURE_ECX_VMX BIT(5)
-+#define X86_CPUID_FEATURE_ECX_VMX RT_BIT(5)
- /** ECX Bit 7 - EST - Enh. SpeedStep Tech. */
--#define X86_CPUID_FEATURE_ECX_EST BIT(7)
-+#define X86_CPUID_FEATURE_ECX_EST RT_BIT(7)
- /** ECX Bit 8 - TM2 - Terminal Monitor 2. */
--#define X86_CPUID_FEATURE_ECX_TM2 BIT(8)
-+#define X86_CPUID_FEATURE_ECX_TM2 RT_BIT(8)
- /** ECX Bit 9 - SSSE3 - Supplemental Streaming SIMD Extensions 3. */
--#define X86_CPUID_FEATURE_ECX_SSSE3 BIT(9)
-+#define X86_CPUID_FEATURE_ECX_SSSE3 RT_BIT(9)
- /** ECX Bit 10 - CNTX-ID - L1 Context ID. */
--#define X86_CPUID_FEATURE_ECX_CNTXID BIT(10)
-+#define X86_CPUID_FEATURE_ECX_CNTXID RT_BIT(10)
- /** ECX Bit 13 - CX16 - CMPXCHG16B. */
--#define X86_CPUID_FEATURE_ECX_CX16 BIT(13)
-+#define X86_CPUID_FEATURE_ECX_CX16 RT_BIT(13)
- /** ECX Bit 14 - xTPR Update Control. Processor supports changing IA32_MISC_ENABLES[bit 23]. */
--#define X86_CPUID_FEATURE_ECX_TPRUPDATE BIT(14)
-+#define X86_CPUID_FEATURE_ECX_TPRUPDATE RT_BIT(14)
- /** ECX Bit 23 - POPCOUNT instruction. */
--#define X86_CPUID_FEATURE_ECX_POPCOUNT BIT(23)
-+#define X86_CPUID_FEATURE_ECX_POPCOUNT RT_BIT(23)
-
-
- /** Bit 0 - FPU - x87 FPU on Chip. */
--#define X86_CPUID_FEATURE_EDX_FPU BIT(0)
-+#define X86_CPUID_FEATURE_EDX_FPU RT_BIT(0)
- /** Bit 1 - VME - Virtual 8086 Mode Enhancements. */
--#define X86_CPUID_FEATURE_EDX_VME BIT(1)
-+#define X86_CPUID_FEATURE_EDX_VME RT_BIT(1)
- /** Bit 2 - DE - Debugging extensions. */
--#define X86_CPUID_FEATURE_EDX_DE BIT(2)
-+#define X86_CPUID_FEATURE_EDX_DE RT_BIT(2)
- /** Bit 3 - PSE - Page Size Extension. */
--#define X86_CPUID_FEATURE_EDX_PSE BIT(3)
-+#define X86_CPUID_FEATURE_EDX_PSE RT_BIT(3)
- /** Bit 4 - TSC - Time Stamp Counter. */
--#define X86_CPUID_FEATURE_EDX_TSC BIT(4)
-+#define X86_CPUID_FEATURE_EDX_TSC RT_BIT(4)
- /** Bit 5 - MSR - Model Specific Registers RDMSR and WRMSR Instructions. */
--#define X86_CPUID_FEATURE_EDX_MSR BIT(5)
-+#define X86_CPUID_FEATURE_EDX_MSR RT_BIT(5)
- /** Bit 6 - PAE - Physical Address Extension. */
--#define X86_CPUID_FEATURE_EDX_PAE BIT(6)
-+#define X86_CPUID_FEATURE_EDX_PAE RT_BIT(6)
- /** Bit 7 - MCE - Machine Check Exception. */
--#define X86_CPUID_FEATURE_EDX_MCE BIT(7)
-+#define X86_CPUID_FEATURE_EDX_MCE RT_BIT(7)
- /** Bit 8 - CX8 - CMPXCHG8B instruction. */
--#define X86_CPUID_FEATURE_EDX_CX8 BIT(8)
-+#define X86_CPUID_FEATURE_EDX_CX8 RT_BIT(8)
- /** Bit 9 - APIC - APIC On-Chip. */
--#define X86_CPUID_FEATURE_EDX_APIC BIT(9)
-+#define X86_CPUID_FEATURE_EDX_APIC RT_BIT(9)
- /** Bit 11 - SEP - SYSENTER and SYSEXIT. */
--#define X86_CPUID_FEATURE_EDX_SEP BIT(11)
-+#define X86_CPUID_FEATURE_EDX_SEP RT_BIT(11)
- /** Bit 12 - MTRR - Memory Type Range Registers. */
--#define X86_CPUID_FEATURE_EDX_MTRR BIT(12)
-+#define X86_CPUID_FEATURE_EDX_MTRR RT_BIT(12)
- /** Bit 13 - PGE - PTE Global Bit. */
--#define X86_CPUID_FEATURE_EDX_PGE BIT(13)
-+#define X86_CPUID_FEATURE_EDX_PGE RT_BIT(13)
- /** Bit 14 - MCA - Machine Check Architecture. */
--#define X86_CPUID_FEATURE_EDX_MCA BIT(14)
-+#define X86_CPUID_FEATURE_EDX_MCA RT_BIT(14)
- /** Bit 15 - CMOV - Conditional Move Instructions. */
--#define X86_CPUID_FEATURE_EDX_CMOV BIT(15)
-+#define X86_CPUID_FEATURE_EDX_CMOV RT_BIT(15)
- /** Bit 16 - PAT - Page Attribute Table. */
--#define X86_CPUID_FEATURE_EDX_PAT BIT(16)
-+#define X86_CPUID_FEATURE_EDX_PAT RT_BIT(16)
- /** Bit 17 - PSE-36 - 36-bit Page Size Extention. */
--#define X86_CPUID_FEATURE_EDX_PSE36 BIT(17)
-+#define X86_CPUID_FEATURE_EDX_PSE36 RT_BIT(17)
- /** Bit 18 - PSN - Processor Serial Number. */
--#define X86_CPUID_FEATURE_EDX_PSN BIT(18)
-+#define X86_CPUID_FEATURE_EDX_PSN RT_BIT(18)
- /** Bit 19 - CLFSH - CLFLUSH Instruction. */
--#define X86_CPUID_FEATURE_EDX_CLFSH BIT(19)
-+#define X86_CPUID_FEATURE_EDX_CLFSH RT_BIT(19)
- /** Bit 21 - DS - Debug Store. */
--#define X86_CPUID_FEATURE_EDX_DS BIT(21)
-+#define X86_CPUID_FEATURE_EDX_DS RT_BIT(21)
- /** Bit 22 - ACPI - Termal Monitor and Software Controlled Clock Facilities. */
--#define X86_CPUID_FEATURE_EDX_ACPI BIT(22)
-+#define X86_CPUID_FEATURE_EDX_ACPI RT_BIT(22)
- /** Bit 23 - MMX - Intel MMX Technology. */
--#define X86_CPUID_FEATURE_EDX_MMX BIT(23)
-+#define X86_CPUID_FEATURE_EDX_MMX RT_BIT(23)
- /** Bit 24 - FXSR - FXSAVE and FXRSTOR Instructions. */
--#define X86_CPUID_FEATURE_EDX_FXSR BIT(24)
-+#define X86_CPUID_FEATURE_EDX_FXSR RT_BIT(24)
- /** Bit 25 - SSE - SSE Support. */
--#define X86_CPUID_FEATURE_EDX_SSE BIT(25)
-+#define X86_CPUID_FEATURE_EDX_SSE RT_BIT(25)
- /** Bit 26 - SSE2 - SSE2 Support. */
--#define X86_CPUID_FEATURE_EDX_SSE2 BIT(26)
-+#define X86_CPUID_FEATURE_EDX_SSE2 RT_BIT(26)
- /** Bit 27 - SS - Self Snoop. */
--#define X86_CPUID_FEATURE_EDX_SS BIT(27)
-+#define X86_CPUID_FEATURE_EDX_SS RT_BIT(27)
- /** Bit 28 - HTT - Hyper-Threading Technology. */
--#define X86_CPUID_FEATURE_EDX_HTT BIT(28)
-+#define X86_CPUID_FEATURE_EDX_HTT RT_BIT(28)
- /** Bit 29 - TM - Therm. Monitor. */
--#define X86_CPUID_FEATURE_EDX_TM BIT(29)
-+#define X86_CPUID_FEATURE_EDX_TM RT_BIT(29)
- /** Bit 31 - PBE - Pending Break Enabled. */
--#define X86_CPUID_FEATURE_EDX_PBE BIT(31)
-+#define X86_CPUID_FEATURE_EDX_PBE RT_BIT(31)
- /** @} */
-
-
-@@ -379,84 +379,84 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- * @{
- */
- /** Bit 0 - FPU - x87 FPU on Chip. */
--#define X86_CPUID_AMD_FEATURE_EDX_FPU BIT(0)
-+#define X86_CPUID_AMD_FEATURE_EDX_FPU RT_BIT(0)
- /** Bit 1 - VME - Virtual 8086 Mode Enhancements. */
--#define X86_CPUID_AMD_FEATURE_EDX_VME BIT(1)
-+#define X86_CPUID_AMD_FEATURE_EDX_VME RT_BIT(1)
- /** Bit 2 - DE - Debugging extensions. */
--#define X86_CPUID_AMD_FEATURE_EDX_DE BIT(2)
-+#define X86_CPUID_AMD_FEATURE_EDX_DE RT_BIT(2)
- /** Bit 3 - PSE - Page Size Extension. */
--#define X86_CPUID_AMD_FEATURE_EDX_PSE BIT(3)
-+#define X86_CPUID_AMD_FEATURE_EDX_PSE RT_BIT(3)
- /** Bit 4 - TSC - Time Stamp Counter. */
--#define X86_CPUID_AMD_FEATURE_EDX_TSC BIT(4)
-+#define X86_CPUID_AMD_FEATURE_EDX_TSC RT_BIT(4)
- /** Bit 5 - MSR - K86 Model Specific Registers RDMSR and WRMSR Instructions. */
--#define X86_CPUID_AMD_FEATURE_EDX_MSR BIT(5)
-+#define X86_CPUID_AMD_FEATURE_EDX_MSR RT_BIT(5)
- /** Bit 6 - PAE - Physical Address Extension. */
--#define X86_CPUID_AMD_FEATURE_EDX_PAE BIT(6)
-+#define X86_CPUID_AMD_FEATURE_EDX_PAE RT_BIT(6)
- /** Bit 7 - MCE - Machine Check Exception. */
--#define X86_CPUID_AMD_FEATURE_EDX_MCE BIT(7)
-+#define X86_CPUID_AMD_FEATURE_EDX_MCE RT_BIT(7)
- /** Bit 8 - CX8 - CMPXCHG8B instruction. */
--#define X86_CPUID_AMD_FEATURE_EDX_CX8 BIT(8)
-+#define X86_CPUID_AMD_FEATURE_EDX_CX8 RT_BIT(8)
- /** Bit 9 - APIC - APIC On-Chip. */
--#define X86_CPUID_AMD_FEATURE_EDX_APIC BIT(9)
-+#define X86_CPUID_AMD_FEATURE_EDX_APIC RT_BIT(9)
- /** Bit 11 - SEP - AMD SYSCALL and SYSRET. */
--#define X86_CPUID_AMD_FEATURE_EDX_SEP BIT(11)
-+#define X86_CPUID_AMD_FEATURE_EDX_SEP RT_BIT(11)
- /** Bit 12 - MTRR - Memory Type Range Registers. */
--#define X86_CPUID_AMD_FEATURE_EDX_MTRR BIT(12)
-+#define X86_CPUID_AMD_FEATURE_EDX_MTRR RT_BIT(12)
- /** Bit 13 - PGE - PTE Global Bit. */
--#define X86_CPUID_AMD_FEATURE_EDX_PGE BIT(13)
-+#define X86_CPUID_AMD_FEATURE_EDX_PGE RT_BIT(13)
- /** Bit 14 - MCA - Machine Check Architecture. */
--#define X86_CPUID_AMD_FEATURE_EDX_MCA BIT(14)
-+#define X86_CPUID_AMD_FEATURE_EDX_MCA RT_BIT(14)
- /** Bit 15 - CMOV - Conditional Move Instructions. */
--#define X86_CPUID_AMD_FEATURE_EDX_CMOV BIT(15)
-+#define X86_CPUID_AMD_FEATURE_EDX_CMOV RT_BIT(15)
- /** Bit 16 - PAT - Page Attribute Table. */
--#define X86_CPUID_AMD_FEATURE_EDX_PAT BIT(16)
-+#define X86_CPUID_AMD_FEATURE_EDX_PAT RT_BIT(16)
- /** Bit 17 - PSE-36 - 36-bit Page Size Extention. */
--#define X86_CPUID_AMD_FEATURE_EDX_PSE36 BIT(17)
-+#define X86_CPUID_AMD_FEATURE_EDX_PSE36 RT_BIT(17)
- /** Bit 20 - NX - AMD No-Execute Page Protection. */
--#define X86_CPUID_AMD_FEATURE_EDX_NX BIT(20)
-+#define X86_CPUID_AMD_FEATURE_EDX_NX RT_BIT(20)
- /** Bit 22 - AXMMX - AMD Extensions to MMX Instructions. */
--#define X86_CPUID_AMD_FEATURE_EDX_AXMMX BIT(22)
-+#define X86_CPUID_AMD_FEATURE_EDX_AXMMX RT_BIT(22)
- /** Bit 23 - MMX - Intel MMX Technology. */
--#define X86_CPUID_AMD_FEATURE_EDX_MMX BIT(23)
-+#define X86_CPUID_AMD_FEATURE_EDX_MMX RT_BIT(23)
- /** Bit 24 - FXSR - FXSAVE and FXRSTOR Instructions. */
--#define X86_CPUID_AMD_FEATURE_EDX_FXSR BIT(24)
-+#define X86_CPUID_AMD_FEATURE_EDX_FXSR RT_BIT(24)
- /** Bit 25 - FFXSR - AMD fast FXSAVE and FXRSTOR Instructions. */
--#define X86_CPUID_AMD_FEATURE_EDX_FFXSR BIT(25)
-+#define X86_CPUID_AMD_FEATURE_EDX_FFXSR RT_BIT(25)
- /** Bit 26 - PAGE1GB - AMD 1GB large page support. */
--#define X86_CPUID_AMD_FEATURE_EDX_PAGE1GB BIT(26)
-+#define X86_CPUID_AMD_FEATURE_EDX_PAGE1GB RT_BIT(26)
- /** Bit 27 - RDTSCP - AMD RDTSCP instruction. */
--#define X86_CPUID_AMD_FEATURE_EDX_RDTSCP BIT(27)
-+#define X86_CPUID_AMD_FEATURE_EDX_RDTSCP RT_BIT(27)
- /** Bit 29 - LM - AMD Long Mode. */
--#define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE BIT(29)
-+#define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE RT_BIT(29)
- /** Bit 30 - 3DNOWEXT - AMD Extensions to 3DNow. */
--#define X86_CPUID_AMD_FEATURE_EDX_3DNOW_EX BIT(30)
-+#define X86_CPUID_AMD_FEATURE_EDX_3DNOW_EX RT_BIT(30)
- /** Bit 31 - 3DNOW - AMD 3DNow. */
--#define X86_CPUID_AMD_FEATURE_EDX_3DNOW BIT(31)
-+#define X86_CPUID_AMD_FEATURE_EDX_3DNOW RT_BIT(31)
-
- /** Bit 0 - LAHF/SAHF - AMD LAHF and SAHF in 64-bit mode. */
--#define X86_CPUID_AMD_FEATURE_ECX_LAHF_SAHF BIT(0)
-+#define X86_CPUID_AMD_FEATURE_ECX_LAHF_SAHF RT_BIT(0)
- /** Bit 1 - CMPL - Core multi-processing legacy mode. */
--#define X86_CPUID_AMD_FEATURE_ECX_CMPL BIT(1)
-+#define X86_CPUID_AMD_FEATURE_ECX_CMPL RT_BIT(1)
- /** Bit 2 - SVM - AMD VM extensions. */
--#define X86_CPUID_AMD_FEATURE_ECX_SVM BIT(2)
-+#define X86_CPUID_AMD_FEATURE_ECX_SVM RT_BIT(2)
- /** Bit 3 - EXTAPIC - AMD extended APIC registers starting at 0x400. */
--#define X86_CPUID_AMD_FEATURE_ECX_EXT_APIC BIT(3)
-+#define X86_CPUID_AMD_FEATURE_ECX_EXT_APIC RT_BIT(3)
- /** Bit 4 - CR8L - AMD LOCK MOV CR0 means MOV CR8. */
--#define X86_CPUID_AMD_FEATURE_ECX_CR8L BIT(4)
-+#define X86_CPUID_AMD_FEATURE_ECX_CR8L RT_BIT(4)
- /** Bit 5 - ABM - AMD Advanced bit manipulation. LZCNT instruction support. */
--#define X86_CPUID_AMD_FEATURE_ECX_ABM BIT(5)
-+#define X86_CPUID_AMD_FEATURE_ECX_ABM RT_BIT(5)
- /** Bit 6 - SSE4A - AMD EXTRQ, INSERTQ, MOVNTSS, and MOVNTSD instruction support. */
--#define X86_CPUID_AMD_FEATURE_ECX_SSE4A BIT(6)
-+#define X86_CPUID_AMD_FEATURE_ECX_SSE4A RT_BIT(6)
- /** Bit 7 - MISALIGNSSE - AMD Misaligned SSE mode. */
--#define X86_CPUID_AMD_FEATURE_ECX_MISALNSSE BIT(7)
-+#define X86_CPUID_AMD_FEATURE_ECX_MISALNSSE RT_BIT(7)
- /** Bit 8 - 3DNOWPRF - AMD PREFETCH and PREFETCHW instruction support. */
--#define X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF BIT(8)
-+#define X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF RT_BIT(8)
- /** Bit 9 - OSVW - AMD OS visible workaround. */
--#define X86_CPUID_AMD_FEATURE_ECX_OSVW BIT(9)
-+#define X86_CPUID_AMD_FEATURE_ECX_OSVW RT_BIT(9)
- /** Bit 12 - SKINIT - AMD SKINIT: SKINIT, STGI, and DEV support. */
--#define X86_CPUID_AMD_FEATURE_ECX_SKINIT BIT(12)
-+#define X86_CPUID_AMD_FEATURE_ECX_SKINIT RT_BIT(12)
- /** Bit 13 - WDT - AMD Watchdog timer support. */
--#define X86_CPUID_AMD_FEATURE_ECX_WDT BIT(13)
-+#define X86_CPUID_AMD_FEATURE_ECX_WDT RT_BIT(13)
-
- /** @} */
-
-@@ -464,47 +464,47 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- /** @name CR0
- * @{ */
- /** Bit 0 - PE - Protection Enabled */
--#define X86_CR0_PE BIT(0)
--#define X86_CR0_PROTECTION_ENABLE BIT(0)
-+#define X86_CR0_PE RT_BIT(0)
-+#define X86_CR0_PROTECTION_ENABLE RT_BIT(0)
- /** Bit 1 - MP - Monitor Coprocessor */
--#define X86_CR0_MP BIT(1)
--#define X86_CR0_MONITOR_COPROCESSOR BIT(1)
-+#define X86_CR0_MP RT_BIT(1)
-+#define X86_CR0_MONITOR_COPROCESSOR RT_BIT(1)
- /** Bit 2 - EM - Emulation. */
--#define X86_CR0_EM BIT(2)
--#define X86_CR0_EMULATE_FPU BIT(2)
-+#define X86_CR0_EM RT_BIT(2)
-+#define X86_CR0_EMULATE_FPU RT_BIT(2)
- /** Bit 3 - TS - Task Switch. */
--#define X86_CR0_TS BIT(3)
--#define X86_CR0_TASK_SWITCH BIT(3)
-+#define X86_CR0_TS RT_BIT(3)
-+#define X86_CR0_TASK_SWITCH RT_BIT(3)
- /** Bit 4 - ET - Extension flag. ('hardcoded' to 1) */
--#define X86_CR0_ET BIT(4)
--#define X86_CR0_EXTENSION_TYPE BIT(4)
-+#define X86_CR0_ET RT_BIT(4)
-+#define X86_CR0_EXTENSION_TYPE RT_BIT(4)
- /** Bit 5 - NE - Numeric error. */
--#define X86_CR0_NE BIT(5)
--#define X86_CR0_NUMERIC_ERROR BIT(5)
-+#define X86_CR0_NE RT_BIT(5)
-+#define X86_CR0_NUMERIC_ERROR RT_BIT(5)
- /** Bit 16 - WP - Write Protect. */
--#define X86_CR0_WP BIT(16)
--#define X86_CR0_WRITE_PROTECT BIT(16)
-+#define X86_CR0_WP RT_BIT(16)
-+#define X86_CR0_WRITE_PROTECT RT_BIT(16)
- /** Bit 18 - AM - Alignment Mask. */
--#define X86_CR0_AM BIT(18)
--#define X86_CR0_ALIGMENT_MASK BIT(18)
-+#define X86_CR0_AM RT_BIT(18)
-+#define X86_CR0_ALIGMENT_MASK RT_BIT(18)
- /** Bit 29 - NW - Not Write-though. */
--#define X86_CR0_NW BIT(29)
--#define X86_CR0_NOT_WRITE_THROUGH BIT(29)
-+#define X86_CR0_NW RT_BIT(29)
-+#define X86_CR0_NOT_WRITE_THROUGH RT_BIT(29)
- /** Bit 30 - WP - Cache Disable. */
--#define X86_CR0_CD BIT(30)
--#define X86_CR0_CACHE_DISABLE BIT(30)
-+#define X86_CR0_CD RT_BIT(30)
-+#define X86_CR0_CACHE_DISABLE RT_BIT(30)
- /** Bit 31 - PG - Paging. */
--#define X86_CR0_PG BIT(31)
--#define X86_CR0_PAGING BIT(31)
-+#define X86_CR0_PG RT_BIT(31)
-+#define X86_CR0_PAGING RT_BIT(31)
- /** @} */
-
-
- /** @name CR3
- * @{ */
- /** Bit 3 - PWT - Page-level Writes Transparent. */
--#define X86_CR3_PWT BIT(3)
-+#define X86_CR3_PWT RT_BIT(3)
- /** Bit 4 - PCD - Page-level Cache Disable. */
--#define X86_CR3_PCD BIT(4)
-+#define X86_CR3_PCD RT_BIT(4)
- /** Bits 12-31 - - Page directory page number. */
- #define X86_CR3_PAGE_MASK (0xfffff000)
- /** Bits 5-31 - - PAE Page directory page number. */
-@@ -515,77 +515,77 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- /** @name CR4
- * @{ */
- /** Bit 0 - VME - Virtual-8086 Mode Extensions. */
--#define X86_CR4_VME BIT(0)
-+#define X86_CR4_VME RT_BIT(0)
- /** Bit 1 - PVI - Protected-Mode Virtual Interrupts. */
--#define X86_CR4_PVI BIT(1)
-+#define X86_CR4_PVI RT_BIT(1)
- /** Bit 2 - TSD - Time Stamp Disable. */
--#define X86_CR4_TSD BIT(2)
-+#define X86_CR4_TSD RT_BIT(2)
- /** Bit 3 - DE - Debugging Extensions. */
--#define X86_CR4_DE BIT(3)
-+#define X86_CR4_DE RT_BIT(3)
- /** Bit 4 - PSE - Page Size Extension. */
--#define X86_CR4_PSE BIT(4)
-+#define X86_CR4_PSE RT_BIT(4)
- /** Bit 5 - PAE - Physical Address Extension. */
--#define X86_CR4_PAE BIT(5)
-+#define X86_CR4_PAE RT_BIT(5)
- /** Bit 6 - MCE - Machine-Check Enable. */
--#define X86_CR4_MCE BIT(6)
-+#define X86_CR4_MCE RT_BIT(6)
- /** Bit 7 - PGE - Page Global Enable. */
--#define X86_CR4_PGE BIT(7)
-+#define X86_CR4_PGE RT_BIT(7)
- /** Bit 8 - PCE - Performance-Monitoring Counter Enable. */
--#define X86_CR4_PCE BIT(8)
-+#define X86_CR4_PCE RT_BIT(8)
- /** Bit 9 - OSFSXR - Operating System Support for FXSAVE and FXRSTORE instruction. */
--#define X86_CR4_OSFSXR BIT(9)
-+#define X86_CR4_OSFSXR RT_BIT(9)
- /** Bit 10 - OSXMMEEXCPT - Operating System Support for Unmasked SIMD Floating-Point Exceptions. */
--#define X86_CR4_OSXMMEEXCPT BIT(10)
-+#define X86_CR4_OSXMMEEXCPT RT_BIT(10)
- /** Bit 13 - VMXE - VMX mode is enabled. */
--#define X86_CR4_VMXE BIT(13)
-+#define X86_CR4_VMXE RT_BIT(13)
- /** @} */
-
-
- /** @name DR6
- * @{ */
- /** Bit 0 - B0 - Breakpoint 0 condition detected. */
--#define X86_DR6_B0 BIT(0)
-+#define X86_DR6_B0 RT_BIT(0)
- /** Bit 1 - B1 - Breakpoint 1 condition detected. */
--#define X86_DR6_B1 BIT(1)
-+#define X86_DR6_B1 RT_BIT(1)
- /** Bit 2 - B2 - Breakpoint 2 condition detected. */
--#define X86_DR6_B2 BIT(2)
-+#define X86_DR6_B2 RT_BIT(2)
- /** Bit 3 - B3 - Breakpoint 3 condition detected. */
--#define X86_DR6_B3 BIT(3)
-+#define X86_DR6_B3 RT_BIT(3)
- /** Bit 13 - BD - Debug register access detected. Corresponds to the X86_DR7_GD bit. */
--#define X86_DR6_BD BIT(13)
-+#define X86_DR6_BD RT_BIT(13)
- /** Bit 14 - BS - Single step */
--#define X86_DR6_BS BIT(14)
-+#define X86_DR6_BS RT_BIT(14)
- /** Bit 15 - BT - Task switch. (TSS T bit.) */
--#define X86_DR6_BT BIT(15)
-+#define X86_DR6_BT RT_BIT(15)
- /** @} */
-
-
- /** @name DR7
- * @{ */
- /** Bit 0 - L0 - Local breakpoint enable. Cleared on task switch. */
--#define X86_DR7_L0 BIT(0)
-+#define X86_DR7_L0 RT_BIT(0)
- /** Bit 1 - G0 - Global breakpoint enable. Not cleared on task switch. */
--#define X86_DR7_G0 BIT(1)
-+#define X86_DR7_G0 RT_BIT(1)
- /** Bit 2 - L1 - Local breakpoint enable. Cleared on task switch. */
--#define X86_DR7_L1 BIT(2)
-+#define X86_DR7_L1 RT_BIT(2)
- /** Bit 3 - G1 - Global breakpoint enable. Not cleared on task switch. */
--#define X86_DR7_G1 BIT(3)
-+#define X86_DR7_G1 RT_BIT(3)
- /** Bit 4 - L2 - Local breakpoint enable. Cleared on task switch. */
--#define X86_DR7_L2 BIT(4)
-+#define X86_DR7_L2 RT_BIT(4)
- /** Bit 5 - G2 - Global breakpoint enable. Not cleared on task switch. */
--#define X86_DR7_G2 BIT(5)
-+#define X86_DR7_G2 RT_BIT(5)
- /** Bit 6 - L3 - Local breakpoint enable. Cleared on task switch. */
--#define X86_DR7_L3 BIT(6)
-+#define X86_DR7_L3 RT_BIT(6)
- /** Bit 7 - G3 - Global breakpoint enable. Not cleared on task switch. */
--#define X86_DR7_G3 BIT(7)
-+#define X86_DR7_G3 RT_BIT(7)
- /** Bit 8 - LE - Local breakpoint exact. (Not supported (read ignored) by P6 and later.) */
--#define X86_DR7_LE BIT(8)
-+#define X86_DR7_LE RT_BIT(8)
- /** Bit 9 - GE - Local breakpoint exact. (Not supported (read ignored) by P6 and later.) */
--#define X86_DR7_GE BIT(9)
-+#define X86_DR7_GE RT_BIT(9)
-
- /** Bit 13 - GD - General detect enable. Enables emulators to get exceptions when
- * any DR register is accessed. */
--#define X86_DR7_GD BIT(13)
-+#define X86_DR7_GD RT_BIT(13)
- /** Bit 16 & 17 - R/W0 - Read write field 0. Values X86_DR7_RW_*. */
- #define X86_DR7_RW0_MASK (3 << 16)
- /** Bit 18 & 19 - LEN0 - Length field 0. Values X86_DR7_LEN_*. */
-@@ -604,7 +604,7 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- #define X86_DR7_LEN3_MASK (3 << 30)
-
- /** Bits which must be 1s. */
--#define X86_DR7_MB1_MASK (BIT(10))
-+#define X86_DR7_MB1_MASK (RT_BIT(10))
-
- /** Calcs the L bit of Nth breakpoint.
- * @param iBp The breakpoint number [0..3].
-@@ -649,7 +649,7 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- #define X86_DR7_LEN(iBp, cb) ( (cb) << ((iBp) * 4 + 18) )
-
- /** Mask used to check if any breakpoints are enabled. */
--#define X86_DR7_ENABLED_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(6) | BIT(7))
-+#define X86_DR7_ENABLED_MASK (RT_BIT(0) | RT_BIT(1) | RT_BIT(2) | RT_BIT(3) | RT_BIT(4) | RT_BIT(6) | RT_BIT(7))
-
- /** @} */
-
-@@ -659,8 +659,8 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- */
- /** CPU Feature control. */
- #define MSR_IA32_FEATURE_CONTROL 0x3A
--#define MSR_IA32_FEATURE_CONTROL_LOCK BIT(0)
--#define MSR_IA32_FEATURE_CONTROL_VMXON BIT(2)
-+#define MSR_IA32_FEATURE_CONTROL_LOCK RT_BIT(0)
-+#define MSR_IA32_FEATURE_CONTROL_VMXON RT_BIT(2)
-
-
- #ifndef MSR_IA32_SYSENTER_CS /* qemu cpu.h klugde */
-@@ -704,19 +704,19 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- #define MSR_K6_EFER 0xc0000080
- /** @todo document EFER */
- /** Bit 0 - SCE - System call extensions (SYSCALL / SYSRET). (R/W) */
--#define MSR_K6_EFER_SCE BIT(0)
-+#define MSR_K6_EFER_SCE RT_BIT(0)
- /** Bit 8 - LME - Long mode enabled. (R/W) */
--#define MSR_K6_EFER_LME BIT(8)
-+#define MSR_K6_EFER_LME RT_BIT(8)
- /** Bit 10 - LMA - Long mode active. (R) */
--#define MSR_K6_EFER_LMA BIT(10)
-+#define MSR_K6_EFER_LMA RT_BIT(10)
- /** Bit 11 - NXE - No-Execute Page Protection Enabled. (R/W) */
--#define MSR_K6_EFER_NXE BIT(11)
-+#define MSR_K6_EFER_NXE RT_BIT(11)
- /** Bit 12 - SVME - Secure VM Extension Enabled. (R/W) */
--#define MSR_K6_EFER_SVME BIT(12)
-+#define MSR_K6_EFER_SVME RT_BIT(12)
- /** Bit 13 - LMSLE - Long Mode Segment Limit Enable. (R/W?) */
--#define MSR_K6_EFER_LMSLE BIT(13)
-+#define MSR_K6_EFER_LMSLE RT_BIT(13)
- /** Bit 14 - FFXSR - Fast FXSAVE / FXRSTOR (skip XMM*). (R/W) */
--#define MSR_K6_EFER_FFXSR BIT(14)
-+#define MSR_K6_EFER_FFXSR RT_BIT(14)
- /** K6 STAR - SYSCALL/RET targets. */
- #define MSR_K6_STAR 0xc0000081
- /** Shift value for getting the SYSRET CS and SS value. */
-@@ -767,7 +767,7 @@ typedef const X86CPUIDFEATEDX *PCX86CPUI
- #define MSR_K8_TOP_MEM1 0xc001001a
- #define MSR_K8_TOP_MEM2 0xc001001d
- #define MSR_K8_VM_CR 0xc0010114
--#define MSR_K8_VM_CR_SVM_DISABLE BIT(4)
-+#define MSR_K8_VM_CR_SVM_DISABLE RT_BIT(4)
-
- #define MSR_K8_IGNNE 0xc0010115
- #define MSR_K8_SMM_CTL 0xc0010116
-@@ -840,25 +840,25 @@ typedef X86PGPAEUINT *PX86PGPAEUINT;
- * @{
- */
- /** Bit 0 - P - Present bit. */
--#define X86_PTE_P BIT(0)
-+#define X86_PTE_P RT_BIT(0)
- /** Bit 1 - R/W - Read (clear) / Write (set) bit. */
--#define X86_PTE_RW BIT(1)
-+#define X86_PTE_RW RT_BIT(1)
- /** Bit 2 - U/S - User (set) / Supervisor (clear) bit. */
--#define X86_PTE_US BIT(2)
-+#define X86_PTE_US RT_BIT(2)
- /** Bit 3 - PWT - Page level write thru bit. */
--#define X86_PTE_PWT BIT(3)
-+#define X86_PTE_PWT RT_BIT(3)
- /** Bit 4 - PCD - Page level cache disable bit. */
--#define X86_PTE_PCD BIT(4)
-+#define X86_PTE_PCD RT_BIT(4)
- /** Bit 5 - A - Access bit. */
--#define X86_PTE_A BIT(5)
-+#define X86_PTE_A RT_BIT(5)
- /** Bit 6 - D - Dirty bit. */
--#define X86_PTE_D BIT(6)
-+#define X86_PTE_D RT_BIT(6)
- /** Bit 7 - PAT - Page Attribute Table index bit. Reserved and 0 if not supported. */
--#define X86_PTE_PAT BIT(7)
-+#define X86_PTE_PAT RT_BIT(7)
- /** Bit 8 - G - Global flag. */
--#define X86_PTE_G BIT(8)
-+#define X86_PTE_G RT_BIT(8)
- /** Bits 9-11 - - Available for use to system software. */
--#define X86_PTE_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+#define X86_PTE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- /** Bits 12-31 - - Physical Page number of the next level. */
- #define X86_PTE_PG_MASK ( 0xfffff000 )
-
-@@ -869,7 +869,7 @@ typedef X86PGPAEUINT *PX86PGPAEUINT;
- #define X86_PTE_PAE_PG_MASK ( 0x000ffffffffff000ULL )
- #endif
- /** Bits 63 - NX - PAE - No execution flag. */
--#define X86_PTE_PAE_NX BIT64(63)
-+#define X86_PTE_PAE_NX RT_BIT_64(63)
-
- /**
- * Page table entry.
-@@ -1033,22 +1033,22 @@ typedef const X86PTPAE *PCX86PTPAE;
- * @{
- */
- /** Bit 0 - P - Present bit. */
--#define X86_PDE_P BIT(0)
-+#define X86_PDE_P RT_BIT(0)
- /** Bit 1 - R/W - Read (clear) / Write (set) bit. */
--#define X86_PDE_RW BIT(1)
-+#define X86_PDE_RW RT_BIT(1)
- /** Bit 2 - U/S - User (set) / Supervisor (clear) bit. */
--#define X86_PDE_US BIT(2)
-+#define X86_PDE_US RT_BIT(2)
- /** Bit 3 - PWT - Page level write thru bit. */
--#define X86_PDE_PWT BIT(3)
-+#define X86_PDE_PWT RT_BIT(3)
- /** Bit 4 - PCD - Page level cache disable bit. */
--#define X86_PDE_PCD BIT(4)
-+#define X86_PDE_PCD RT_BIT(4)
- /** Bit 5 - A - Access bit. */
--#define X86_PDE_A BIT(5)
-+#define X86_PDE_A RT_BIT(5)
- /** Bit 7 - PS - Page size attribute.
- * Clear mean 4KB pages, set means large pages (2/4MB). */
--#define X86_PDE_PS BIT(7)
-+#define X86_PDE_PS RT_BIT(7)
- /** Bits 9-11 - - Available for use to system software. */
--#define X86_PDE_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+#define X86_PDE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- /** Bits 12-31 - - Physical Page number of the next level. */
- #define X86_PDE_PG_MASK ( 0xfffff000 )
-
-@@ -1059,7 +1059,7 @@ typedef const X86PTPAE *PCX86PTPAE;
- #define X86_PDE_PAE_PG_MASK ( 0x000ffffffffff000ULL )
- #endif
- /** Bits 63 - NX - PAE - No execution flag. */
--#define X86_PDE_PAE_NX BIT64(63)
-+#define X86_PDE_PAE_NX RT_BIT_64(63)
-
- /**
- * Page directory entry.
-@@ -1143,27 +1143,27 @@ typedef const X86PDEPAEBITS *PCX86PDEPAE
- * @{
- */
- /** Bit 0 - P - Present bit. */
--#define X86_PDE4M_P BIT(0)
-+#define X86_PDE4M_P RT_BIT(0)
- /** Bit 1 - R/W - Read (clear) / Write (set) bit. */
--#define X86_PDE4M_RW BIT(1)
-+#define X86_PDE4M_RW RT_BIT(1)
- /** Bit 2 - U/S - User (set) / Supervisor (clear) bit. */
--#define X86_PDE4M_US BIT(2)
-+#define X86_PDE4M_US RT_BIT(2)
- /** Bit 3 - PWT - Page level write thru bit. */
--#define X86_PDE4M_PWT BIT(3)
-+#define X86_PDE4M_PWT RT_BIT(3)
- /** Bit 4 - PCD - Page level cache disable bit. */
--#define X86_PDE4M_PCD BIT(4)
-+#define X86_PDE4M_PCD RT_BIT(4)
- /** Bit 5 - A - Access bit. */
--#define X86_PDE4M_A BIT(5)
-+#define X86_PDE4M_A RT_BIT(5)
- /** Bit 6 - D - Dirty bit. */
--#define X86_PDE4M_D BIT(6)
-+#define X86_PDE4M_D RT_BIT(6)
- /** Bit 7 - PS - Page size attribute. Clear mean 4KB pages, set means large pages (2/4MB). */
--#define X86_PDE4M_PS BIT(7)
-+#define X86_PDE4M_PS RT_BIT(7)
- /** Bit 8 - G - Global flag. */
--#define X86_PDE4M_G BIT(8)
-+#define X86_PDE4M_G RT_BIT(8)
- /** Bits 9-11 - AVL - Available for use to system software. */
--#define X86_PDE4M_AVL (BIT(9) | BIT(10) | BIT(11))
-+#define X86_PDE4M_AVL (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- /** Bit 12 - PAT - Page Attribute Table index bit. Reserved and 0 if not supported. */
--#define X86_PDE4M_PAT BIT(12)
-+#define X86_PDE4M_PAT RT_BIT(12)
- /** Shift to get from X86_PTE_PAT to X86_PDE4M_PAT. */
- #define X86_PDE4M_PAT_SHIFT (12 - 7)
- /** Bits 22-31 - - Physical Page number. */
-@@ -1176,7 +1176,7 @@ typedef const X86PDEPAEBITS *PCX86PDEPAE
- /** Bits 12-51 - - PAE - Physical Page number. */
- #define X86_PDE4M_PAE_PG_MASK ( 0x000fffffffc00000ULL )
- /** Bits 63 - NX - PAE - No execution flag. */
--#define X86_PDE4M_PAE_NX BIT64(63)
-+#define X86_PDE4M_PAE_NX RT_BIT_64(63)
-
- /**
- * 4MB page directory entry.
-@@ -1356,19 +1356,19 @@ typedef const X86PDPAE *PCX86PDPAE;
- * @{
- */
- /** Bit 0 - P - Present bit. */
--#define X86_PDPE_P BIT(0)
-+#define X86_PDPE_P RT_BIT(0)
- /** Bit 1 - R/W - Read (clear) / Write (set) bit. Long Mode only. */
--#define X86_PDPE_RW BIT(1)
-+#define X86_PDPE_RW RT_BIT(1)
- /** Bit 2 - U/S - User (set) / Supervisor (clear) bit. Long Mode only. */
--#define X86_PDPE_US BIT(2)
-+#define X86_PDPE_US RT_BIT(2)
- /** Bit 3 - PWT - Page level write thru bit. */
--#define X86_PDPE_PWT BIT(3)
-+#define X86_PDPE_PWT RT_BIT(3)
- /** Bit 4 - PCD - Page level cache disable bit. */
--#define X86_PDPE_PCD BIT(4)
-+#define X86_PDPE_PCD RT_BIT(4)
- /** Bit 5 - A - Access bit. Long Mode only. */
--#define X86_PDPE_A BIT(5)
-+#define X86_PDPE_A RT_BIT(5)
- /** Bits 9-11 - - Available for use to system software. */
--#define X86_PDPE_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+#define X86_PDPE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- /** Bits 12-51 - - PAE - Physical Page number of the next level. */
- #if 1 /* we're using this internally and have to mask of the top 16-bit. */
- #define X86_PDPE_PG_MASK ( 0x0000fffffffff000ULL )
-@@ -1376,7 +1376,7 @@ typedef const X86PDPAE *PCX86PDPAE;
- #define X86_PDPE_PG_MASK ( 0x000ffffffffff000ULL )
- #endif
- /** Bits 63 - NX - PAE - No execution flag. */
--#define X86_PDPE_NX BIT64(63)
-+#define X86_PDPE_NX RT_BIT_64(63)
-
- /**
- * Page directory pointer table entry.
-@@ -1463,19 +1463,19 @@ typedef const X86PDPTR *PCX86PDPTR;
- * @{
- */
- /** Bit 0 - P - Present bit. */
--#define X86_PML4E_P BIT(0)
-+#define X86_PML4E_P RT_BIT(0)
- /** Bit 1 - R/W - Read (clear) / Write (set) bit. */
--#define X86_PML4E_RW BIT(1)
-+#define X86_PML4E_RW RT_BIT(1)
- /** Bit 2 - U/S - User (set) / Supervisor (clear) bit. */
--#define X86_PML4E_US BIT(2)
-+#define X86_PML4E_US RT_BIT(2)
- /** Bit 3 - PWT - Page level write thru bit. */
--#define X86_PML4E_PWT BIT(3)
-+#define X86_PML4E_PWT RT_BIT(3)
- /** Bit 4 - PCD - Page level cache disable bit. */
--#define X86_PML4E_PCD BIT(4)
-+#define X86_PML4E_PCD RT_BIT(4)
- /** Bit 5 - A - Access bit. */
--#define X86_PML4E_A BIT(5)
-+#define X86_PML4E_A RT_BIT(5)
- /** Bits 9-11 - - Available for use to system software. */
--#define X86_PML4E_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+#define X86_PML4E_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- /** Bits 12-51 - - PAE - Physical Page number of the next level. */
- #if 1 /* we're using this internally and have to mask of the top 16-bit. */
- #define X86_PML4E_PG_MASK ( 0x0000fffffffff000ULL )
-@@ -1483,7 +1483,7 @@ typedef const X86PDPTR *PCX86PDPTR;
- #define X86_PML4E_PG_MASK ( 0x000ffffffffff000ULL )
- #endif
- /** Bits 63 - NX - PAE - No execution flag. */
--#define X86_PML4E_NX BIT64(63)
-+#define X86_PML4E_NX RT_BIT_64(63)
-
- /**
- * Page Map Level-4 Entry
-@@ -1948,7 +1948,7 @@ typedef X86DESC *PX86DESCHC;
- /** Code(=set)/Data(=clear) bit. */
- #define X86_SEL_TYPE_CODE 8
- /** Memory(=set)/System(=clear) bit. */
--#define X86_SEL_TYPE_MEMORY BIT(4)
-+#define X86_SEL_TYPE_MEMORY RT_BIT(4)
- /** Accessed bit. */
- #define X86_SEL_TYPE_ACCESSED 1
- /** Expand down bit (for data selectors only). */
-@@ -2053,20 +2053,20 @@ typedef X86DESC *PX86DESCHC;
- * These are for the 2nd 32-bit word of a descriptor.
- * @{ */
- /** Bits 8-11 - TYPE - Descriptor type mask. */
--#define X86_DESC_TYPE_MASK (BIT(8) | BIT(9) | BIT(10) | BIT(11))
-+#define X86_DESC_TYPE_MASK (RT_BIT(8) | RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- /** Bit 12 - S - System (=0) or Code/Data (=1). */
--#define X86_DESC_S BIT(12)
-+#define X86_DESC_S RT_BIT(12)
- /** Bits 13-14 - DPL - Descriptor Privilege Level. */
--#define X86_DESC_DPL (BIT(13) | BIT(14))
-+#define X86_DESC_DPL (RT_BIT(13) | RT_BIT(14))
- /** Bit 15 - P - Present. */
--#define X86_DESC_P BIT(15)
-+#define X86_DESC_P RT_BIT(15)
- /** Bit 20 - AVL - Available for system software. */
--#define X86_DESC_AVL BIT(20)
-+#define X86_DESC_AVL RT_BIT(20)
- /** Bit 22 - DB - Default operation size. 0 = 16 bit, 1 = 32 bit. */
--#define X86_DESC_DB BIT(22)
-+#define X86_DESC_DB RT_BIT(22)
- /** Bit 23 - G - Granularity of the limit. If set 4KB granularity is
- * used, if clear byte. */
--#define X86_DESC_G BIT(23)
-+#define X86_DESC_G RT_BIT(23)
- /** @} */
-
- /** @} */
-@@ -2180,15 +2180,15 @@ typedef const X86XCPT *PCX86XCPT;
- * @{
- */
- /** Bit 0 - P - Not present (clear) or page level protection (set) fault. */
--#define X86_TRAP_PF_P BIT(0)
-+#define X86_TRAP_PF_P RT_BIT(0)
- /** Bit 1 - R/W - Read (clear) or write (set) access. */
--#define X86_TRAP_PF_RW BIT(1)
-+#define X86_TRAP_PF_RW RT_BIT(1)
- /** Bit 2 - U/S - CPU executing in user mode (set) or supervisor mode (clear). */
--#define X86_TRAP_PF_US BIT(2)
-+#define X86_TRAP_PF_US RT_BIT(2)
- /** Bit 3 - RSVD- Reserved bit violation (set), i.e. reserved bit was set to 1. */
--#define X86_TRAP_PF_RSVD BIT(3)
-+#define X86_TRAP_PF_RSVD RT_BIT(3)
- /** Bit 4 - I/D - Instruction fetch (set) / Data access (clear) - PAE + NXE. */
--#define X86_TRAP_PF_ID BIT(4)
-+#define X86_TRAP_PF_ID RT_BIT(4)
- /** @} */
-
- #pragma pack(1)
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/x86.mac virtualbox-ose-1.5.2-dfsg2/include/VBox/x86.mac
---- virtualbox-ose-1.5.2-dfsg2.orig/include/VBox/x86.mac 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/VBox/x86.mac 2007-12-18 14:54:48.000000000 +0000
-@@ -1,156 +1,156 @@
--%define X86_EFL_CF BIT(0)
--%define X86_EFL_PF BIT(2)
--%define X86_EFL_AF BIT(4)
--%define X86_EFL_ZF BIT(6)
--%define X86_EFL_SF BIT(7)
--%define X86_EFL_TF BIT(8)
--%define X86_EFL_IF BIT(9)
--%define X86_EFL_DF BIT(10)
--%define X86_EFL_OF BIT(11)
--%define X86_EFL_IOPL (BIT(12) | BIT(13))
--%define X86_EFL_NT BIT(14)
--%define X86_EFL_RF BIT(16)
--%define X86_EFL_VM BIT(17)
--%define X86_EFL_AC BIT(18)
--%define X86_EFL_VIF BIT(19)
--%define X86_EFL_VIP BIT(20)
--%define X86_EFL_ID BIT(21)
-+%define X86_EFL_CF RT_BIT(0)
-+%define X86_EFL_PF RT_BIT(2)
-+%define X86_EFL_AF RT_BIT(4)
-+%define X86_EFL_ZF RT_BIT(6)
-+%define X86_EFL_SF RT_BIT(7)
-+%define X86_EFL_TF RT_BIT(8)
-+%define X86_EFL_IF RT_BIT(9)
-+%define X86_EFL_DF RT_BIT(10)
-+%define X86_EFL_OF RT_BIT(11)
-+%define X86_EFL_IOPL (RT_BIT(12) | RT_BIT(13))
-+%define X86_EFL_NT RT_BIT(14)
-+%define X86_EFL_RF RT_BIT(16)
-+%define X86_EFL_VM RT_BIT(17)
-+%define X86_EFL_AC RT_BIT(18)
-+%define X86_EFL_VIF RT_BIT(19)
-+%define X86_EFL_VIP RT_BIT(20)
-+%define X86_EFL_ID RT_BIT(21)
- %define X86_EFL_IOPL_SHIFT 12
- %define X86_EFL_GET_IOPL(efl) (((efl) >> X86_EFL_IOPL_SHIFT) & 3)
--%define X86_CPUID_FEATURE_ECX_SSE3 BIT(0)
--%define X86_CPUID_FEATURE_ECX_MONITOR BIT(3)
--%define X86_CPUID_FEATURE_ECX_CPLDS BIT(4)
--%define X86_CPUID_FEATURE_ECX_VMX BIT(5)
--%define X86_CPUID_FEATURE_ECX_EST BIT(7)
--%define X86_CPUID_FEATURE_ECX_TM2 BIT(8)
--%define X86_CPUID_FEATURE_ECX_SSSE3 BIT(9)
--%define X86_CPUID_FEATURE_ECX_CNTXID BIT(10)
--%define X86_CPUID_FEATURE_ECX_CX16 BIT(13)
--%define X86_CPUID_FEATURE_ECX_TPRUPDATE BIT(14)
--%define X86_CPUID_FEATURE_ECX_POPCOUNT BIT(23)
--%define X86_CPUID_FEATURE_EDX_FPU BIT(0)
--%define X86_CPUID_FEATURE_EDX_VME BIT(1)
--%define X86_CPUID_FEATURE_EDX_DE BIT(2)
--%define X86_CPUID_FEATURE_EDX_PSE BIT(3)
--%define X86_CPUID_FEATURE_EDX_TSC BIT(4)
--%define X86_CPUID_FEATURE_EDX_MSR BIT(5)
--%define X86_CPUID_FEATURE_EDX_PAE BIT(6)
--%define X86_CPUID_FEATURE_EDX_MCE BIT(7)
--%define X86_CPUID_FEATURE_EDX_CX8 BIT(8)
--%define X86_CPUID_FEATURE_EDX_APIC BIT(9)
--%define X86_CPUID_FEATURE_EDX_SEP BIT(11)
--%define X86_CPUID_FEATURE_EDX_MTRR BIT(12)
--%define X86_CPUID_FEATURE_EDX_PGE BIT(13)
--%define X86_CPUID_FEATURE_EDX_MCA BIT(14)
--%define X86_CPUID_FEATURE_EDX_CMOV BIT(15)
--%define X86_CPUID_FEATURE_EDX_PAT BIT(16)
--%define X86_CPUID_FEATURE_EDX_PSE36 BIT(17)
--%define X86_CPUID_FEATURE_EDX_PSN BIT(18)
--%define X86_CPUID_FEATURE_EDX_CLFSH BIT(19)
--%define X86_CPUID_FEATURE_EDX_DS BIT(21)
--%define X86_CPUID_FEATURE_EDX_ACPI BIT(22)
--%define X86_CPUID_FEATURE_EDX_MMX BIT(23)
--%define X86_CPUID_FEATURE_EDX_FXSR BIT(24)
--%define X86_CPUID_FEATURE_EDX_SSE BIT(25)
--%define X86_CPUID_FEATURE_EDX_SSE2 BIT(26)
--%define X86_CPUID_FEATURE_EDX_SS BIT(27)
--%define X86_CPUID_FEATURE_EDX_HTT BIT(28)
--%define X86_CPUID_FEATURE_EDX_TM BIT(29)
--%define X86_CPUID_FEATURE_EDX_PBE BIT(31)
--%define X86_CPUID_AMD_FEATURE_EDX_FPU BIT(0)
--%define X86_CPUID_AMD_FEATURE_EDX_VME BIT(1)
--%define X86_CPUID_AMD_FEATURE_EDX_DE BIT(2)
--%define X86_CPUID_AMD_FEATURE_EDX_PSE BIT(3)
--%define X86_CPUID_AMD_FEATURE_EDX_TSC BIT(4)
--%define X86_CPUID_AMD_FEATURE_EDX_MSR BIT(5)
--%define X86_CPUID_AMD_FEATURE_EDX_PAE BIT(6)
--%define X86_CPUID_AMD_FEATURE_EDX_MCE BIT(7)
--%define X86_CPUID_AMD_FEATURE_EDX_CX8 BIT(8)
--%define X86_CPUID_AMD_FEATURE_EDX_APIC BIT(9)
--%define X86_CPUID_AMD_FEATURE_EDX_SEP BIT(11)
--%define X86_CPUID_AMD_FEATURE_EDX_MTRR BIT(12)
--%define X86_CPUID_AMD_FEATURE_EDX_PGE BIT(13)
--%define X86_CPUID_AMD_FEATURE_EDX_MCA BIT(14)
--%define X86_CPUID_AMD_FEATURE_EDX_CMOV BIT(15)
--%define X86_CPUID_AMD_FEATURE_EDX_PAT BIT(16)
--%define X86_CPUID_AMD_FEATURE_EDX_PSE36 BIT(17)
--%define X86_CPUID_AMD_FEATURE_EDX_NX BIT(20)
--%define X86_CPUID_AMD_FEATURE_EDX_AXMMX BIT(22)
--%define X86_CPUID_AMD_FEATURE_EDX_MMX BIT(23)
--%define X86_CPUID_AMD_FEATURE_EDX_FXSR BIT(24)
--%define X86_CPUID_AMD_FEATURE_EDX_FFXSR BIT(25)
--%define X86_CPUID_AMD_FEATURE_EDX_PAGE1GB BIT(26)
--%define X86_CPUID_AMD_FEATURE_EDX_RDTSCP BIT(27)
--%define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE BIT(29)
--%define X86_CPUID_AMD_FEATURE_EDX_3DNOW_EX BIT(30)
--%define X86_CPUID_AMD_FEATURE_EDX_3DNOW BIT(31)
--%define X86_CPUID_AMD_FEATURE_ECX_CMPL BIT(1)
--%define X86_CPUID_AMD_FEATURE_ECX_SVM BIT(2)
--%define X86_CPUID_AMD_FEATURE_ECX_EXT_APIC BIT(3)
--%define X86_CPUID_AMD_FEATURE_ECX_CR8L BIT(4)
--%define X86_CPUID_AMD_FEATURE_ECX_ABM BIT(5)
--%define X86_CPUID_AMD_FEATURE_ECX_SSE4A BIT(6)
--%define X86_CPUID_AMD_FEATURE_ECX_MISALNSSE BIT(7)
--%define X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF BIT(8)
--%define X86_CPUID_AMD_FEATURE_ECX_OSVW BIT(9)
--%define X86_CPUID_AMD_FEATURE_ECX_SKINIT BIT(12)
--%define X86_CPUID_AMD_FEATURE_ECX_WDT BIT(13)
--%define X86_CR0_PE BIT(0)
--%define X86_CR0_PROTECTION_ENABLE BIT(0)
--%define X86_CR0_MP BIT(1)
--%define X86_CR0_MONITOR_COPROCESSOR BIT(1)
--%define X86_CR0_EM BIT(2)
--%define X86_CR0_EMULATE_FPU BIT(2)
--%define X86_CR0_TS BIT(3)
--%define X86_CR0_TASK_SWITCH BIT(3)
--%define X86_CR0_ET BIT(4)
--%define X86_CR0_EXTENSION_TYPE BIT(4)
--%define X86_CR0_NE BIT(5)
--%define X86_CR0_NUMERIC_ERROR BIT(5)
--%define X86_CR0_WP BIT(16)
--%define X86_CR0_WRITE_PROTECT BIT(16)
--%define X86_CR0_AM BIT(18)
--%define X86_CR0_ALIGMENT_MASK BIT(18)
--%define X86_CR0_NW BIT(29)
--%define X86_CR0_NOT_WRITE_THROUGH BIT(29)
--%define X86_CR0_CD BIT(30)
--%define X86_CR0_CACHE_DISABLE BIT(30)
--%define X86_CR0_PG BIT(31)
--%define X86_CR0_PAGING BIT(31)
--%define X86_CR3_PWT BIT(3)
--%define X86_CR3_PCD BIT(4)
-+%define X86_CPUID_FEATURE_ECX_SSE3 RT_BIT(0)
-+%define X86_CPUID_FEATURE_ECX_MONITOR RT_BIT(3)
-+%define X86_CPUID_FEATURE_ECX_CPLDS RT_BIT(4)
-+%define X86_CPUID_FEATURE_ECX_VMX RT_BIT(5)
-+%define X86_CPUID_FEATURE_ECX_EST RT_BIT(7)
-+%define X86_CPUID_FEATURE_ECX_TM2 RT_BIT(8)
-+%define X86_CPUID_FEATURE_ECX_SSSE3 RT_BIT(9)
-+%define X86_CPUID_FEATURE_ECX_CNTXID RT_BIT(10)
-+%define X86_CPUID_FEATURE_ECX_CX16 RT_BIT(13)
-+%define X86_CPUID_FEATURE_ECX_TPRUPDATE RT_BIT(14)
-+%define X86_CPUID_FEATURE_ECX_POPCOUNT RT_BIT(23)
-+%define X86_CPUID_FEATURE_EDX_FPU RT_BIT(0)
-+%define X86_CPUID_FEATURE_EDX_VME RT_BIT(1)
-+%define X86_CPUID_FEATURE_EDX_DE RT_BIT(2)
-+%define X86_CPUID_FEATURE_EDX_PSE RT_BIT(3)
-+%define X86_CPUID_FEATURE_EDX_TSC RT_BIT(4)
-+%define X86_CPUID_FEATURE_EDX_MSR RT_BIT(5)
-+%define X86_CPUID_FEATURE_EDX_PAE RT_BIT(6)
-+%define X86_CPUID_FEATURE_EDX_MCE RT_BIT(7)
-+%define X86_CPUID_FEATURE_EDX_CX8 RT_BIT(8)
-+%define X86_CPUID_FEATURE_EDX_APIC RT_BIT(9)
-+%define X86_CPUID_FEATURE_EDX_SEP RT_BIT(11)
-+%define X86_CPUID_FEATURE_EDX_MTRR RT_BIT(12)
-+%define X86_CPUID_FEATURE_EDX_PGE RT_BIT(13)
-+%define X86_CPUID_FEATURE_EDX_MCA RT_BIT(14)
-+%define X86_CPUID_FEATURE_EDX_CMOV RT_BIT(15)
-+%define X86_CPUID_FEATURE_EDX_PAT RT_BIT(16)
-+%define X86_CPUID_FEATURE_EDX_PSE36 RT_BIT(17)
-+%define X86_CPUID_FEATURE_EDX_PSN RT_BIT(18)
-+%define X86_CPUID_FEATURE_EDX_CLFSH RT_BIT(19)
-+%define X86_CPUID_FEATURE_EDX_DS RT_BIT(21)
-+%define X86_CPUID_FEATURE_EDX_ACPI RT_BIT(22)
-+%define X86_CPUID_FEATURE_EDX_MMX RT_BIT(23)
-+%define X86_CPUID_FEATURE_EDX_FXSR RT_BIT(24)
-+%define X86_CPUID_FEATURE_EDX_SSE RT_BIT(25)
-+%define X86_CPUID_FEATURE_EDX_SSE2 RT_BIT(26)
-+%define X86_CPUID_FEATURE_EDX_SS RT_BIT(27)
-+%define X86_CPUID_FEATURE_EDX_HTT RT_BIT(28)
-+%define X86_CPUID_FEATURE_EDX_TM RT_BIT(29)
-+%define X86_CPUID_FEATURE_EDX_PBE RT_BIT(31)
-+%define X86_CPUID_AMD_FEATURE_EDX_FPU RT_BIT(0)
-+%define X86_CPUID_AMD_FEATURE_EDX_VME RT_BIT(1)
-+%define X86_CPUID_AMD_FEATURE_EDX_DE RT_BIT(2)
-+%define X86_CPUID_AMD_FEATURE_EDX_PSE RT_BIT(3)
-+%define X86_CPUID_AMD_FEATURE_EDX_TSC RT_BIT(4)
-+%define X86_CPUID_AMD_FEATURE_EDX_MSR RT_BIT(5)
-+%define X86_CPUID_AMD_FEATURE_EDX_PAE RT_BIT(6)
-+%define X86_CPUID_AMD_FEATURE_EDX_MCE RT_BIT(7)
-+%define X86_CPUID_AMD_FEATURE_EDX_CX8 RT_BIT(8)
-+%define X86_CPUID_AMD_FEATURE_EDX_APIC RT_BIT(9)
-+%define X86_CPUID_AMD_FEATURE_EDX_SEP RT_BIT(11)
-+%define X86_CPUID_AMD_FEATURE_EDX_MTRR RT_BIT(12)
-+%define X86_CPUID_AMD_FEATURE_EDX_PGE RT_BIT(13)
-+%define X86_CPUID_AMD_FEATURE_EDX_MCA RT_BIT(14)
-+%define X86_CPUID_AMD_FEATURE_EDX_CMOV RT_BIT(15)
-+%define X86_CPUID_AMD_FEATURE_EDX_PAT RT_BIT(16)
-+%define X86_CPUID_AMD_FEATURE_EDX_PSE36 RT_BIT(17)
-+%define X86_CPUID_AMD_FEATURE_EDX_NX RT_BIT(20)
-+%define X86_CPUID_AMD_FEATURE_EDX_AXMMX RT_BIT(22)
-+%define X86_CPUID_AMD_FEATURE_EDX_MMX RT_BIT(23)
-+%define X86_CPUID_AMD_FEATURE_EDX_FXSR RT_BIT(24)
-+%define X86_CPUID_AMD_FEATURE_EDX_FFXSR RT_BIT(25)
-+%define X86_CPUID_AMD_FEATURE_EDX_PAGE1GB RT_BIT(26)
-+%define X86_CPUID_AMD_FEATURE_EDX_RDTSCP RT_BIT(27)
-+%define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE RT_BIT(29)
-+%define X86_CPUID_AMD_FEATURE_EDX_3DNOW_EX RT_BIT(30)
-+%define X86_CPUID_AMD_FEATURE_EDX_3DNOW RT_BIT(31)
-+%define X86_CPUID_AMD_FEATURE_ECX_CMPL RT_BIT(1)
-+%define X86_CPUID_AMD_FEATURE_ECX_SVM RT_BIT(2)
-+%define X86_CPUID_AMD_FEATURE_ECX_EXT_APIC RT_BIT(3)
-+%define X86_CPUID_AMD_FEATURE_ECX_CR8L RT_BIT(4)
-+%define X86_CPUID_AMD_FEATURE_ECX_ABM RT_BIT(5)
-+%define X86_CPUID_AMD_FEATURE_ECX_SSE4A RT_BIT(6)
-+%define X86_CPUID_AMD_FEATURE_ECX_MISALNSSE RT_BIT(7)
-+%define X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF RT_BIT(8)
-+%define X86_CPUID_AMD_FEATURE_ECX_OSVW RT_BIT(9)
-+%define X86_CPUID_AMD_FEATURE_ECX_SKINIT RT_BIT(12)
-+%define X86_CPUID_AMD_FEATURE_ECX_WDT RT_BIT(13)
-+%define X86_CR0_PE RT_BIT(0)
-+%define X86_CR0_PROTECTION_ENABLE RT_BIT(0)
-+%define X86_CR0_MP RT_BIT(1)
-+%define X86_CR0_MONITOR_COPROCESSOR RT_BIT(1)
-+%define X86_CR0_EM RT_BIT(2)
-+%define X86_CR0_EMULATE_FPU RT_BIT(2)
-+%define X86_CR0_TS RT_BIT(3)
-+%define X86_CR0_TASK_SWITCH RT_BIT(3)
-+%define X86_CR0_ET RT_BIT(4)
-+%define X86_CR0_EXTENSION_TYPE RT_BIT(4)
-+%define X86_CR0_NE RT_BIT(5)
-+%define X86_CR0_NUMERIC_ERROR RT_BIT(5)
-+%define X86_CR0_WP RT_BIT(16)
-+%define X86_CR0_WRITE_PROTECT RT_BIT(16)
-+%define X86_CR0_AM RT_BIT(18)
-+%define X86_CR0_ALIGMENT_MASK RT_BIT(18)
-+%define X86_CR0_NW RT_BIT(29)
-+%define X86_CR0_NOT_WRITE_THROUGH RT_BIT(29)
-+%define X86_CR0_CD RT_BIT(30)
-+%define X86_CR0_CACHE_DISABLE RT_BIT(30)
-+%define X86_CR0_PG RT_BIT(31)
-+%define X86_CR0_PAGING RT_BIT(31)
-+%define X86_CR3_PWT RT_BIT(3)
-+%define X86_CR3_PCD RT_BIT(4)
- %define X86_CR3_PAGE_MASK (0xfffff000)
- %define X86_CR3_PAE_PAGE_MASK (0xffffffe0)
--%define X86_CR4_VME BIT(0)
--%define X86_CR4_PVI BIT(1)
--%define X86_CR4_TSD BIT(2)
--%define X86_CR4_DE BIT(3)
--%define X86_CR4_PSE BIT(4)
--%define X86_CR4_PAE BIT(5)
--%define X86_CR4_MCE BIT(6)
--%define X86_CR4_PGE BIT(7)
--%define X86_CR4_PCE BIT(8)
--%define X86_CR4_OSFSXR BIT(9)
--%define X86_CR4_OSXMMEEXCPT BIT(10)
--%define X86_CR4_VMXE BIT(13)
--%define X86_DR6_B0 BIT(0)
--%define X86_DR6_B1 BIT(1)
--%define X86_DR6_B2 BIT(2)
--%define X86_DR6_B3 BIT(3)
--%define X86_DR6_BD BIT(13)
--%define X86_DR6_BS BIT(14)
--%define X86_DR6_BT BIT(15)
--%define X86_DR7_L0 BIT(0)
--%define X86_DR7_G0 BIT(1)
--%define X86_DR7_L1 BIT(2)
--%define X86_DR7_G1 BIT(3)
--%define X86_DR7_L2 BIT(4)
--%define X86_DR7_G2 BIT(5)
--%define X86_DR7_L3 BIT(6)
--%define X86_DR7_G3 BIT(7)
--%define X86_DR7_LE BIT(8)
--%define X86_DR7_GE BIT(9)
--%define X86_DR7_GD BIT(13)
-+%define X86_CR4_VME RT_BIT(0)
-+%define X86_CR4_PVI RT_BIT(1)
-+%define X86_CR4_TSD RT_BIT(2)
-+%define X86_CR4_DE RT_BIT(3)
-+%define X86_CR4_PSE RT_BIT(4)
-+%define X86_CR4_PAE RT_BIT(5)
-+%define X86_CR4_MCE RT_BIT(6)
-+%define X86_CR4_PGE RT_BIT(7)
-+%define X86_CR4_PCE RT_BIT(8)
-+%define X86_CR4_OSFSXR RT_BIT(9)
-+%define X86_CR4_OSXMMEEXCPT RT_BIT(10)
-+%define X86_CR4_VMXE RT_BIT(13)
-+%define X86_DR6_B0 RT_BIT(0)
-+%define X86_DR6_B1 RT_BIT(1)
-+%define X86_DR6_B2 RT_BIT(2)
-+%define X86_DR6_B3 RT_BIT(3)
-+%define X86_DR6_BD RT_BIT(13)
-+%define X86_DR6_BS RT_BIT(14)
-+%define X86_DR6_BT RT_BIT(15)
-+%define X86_DR7_L0 RT_BIT(0)
-+%define X86_DR7_G0 RT_BIT(1)
-+%define X86_DR7_L1 RT_BIT(2)
-+%define X86_DR7_G1 RT_BIT(3)
-+%define X86_DR7_L2 RT_BIT(4)
-+%define X86_DR7_G2 RT_BIT(5)
-+%define X86_DR7_L3 RT_BIT(6)
-+%define X86_DR7_G3 RT_BIT(7)
-+%define X86_DR7_LE RT_BIT(8)
-+%define X86_DR7_GE RT_BIT(9)
-+%define X86_DR7_GD RT_BIT(13)
- %define X86_DR7_RW0_MASK (3 << 16)
- %define X86_DR7_LEN0_MASK (3 << 18)
- %define X86_DR7_RW1_MASK (3 << 20)
-@@ -159,7 +159,7 @@
- %define X86_DR7_LEN2_MASK (3 << 26)
- %define X86_DR7_RW3_MASK (3 << 28)
- %define X86_DR7_LEN3_MASK (3 << 30)
--%define X86_DR7_MB1_MASK (BIT(10))
-+%define X86_DR7_MB1_MASK (RT_BIT(10))
- %define X86_DR7_L(iBp) ( 1 << (iBp * 2) )
- %define X86_DR7_G(iBp) ( 1 << (iBp * 2 + 1) )
- %define X86_DR7_RW_EO 0
-@@ -172,10 +172,10 @@
- %define X86_DR7_LEN_QWORD 2 /**< AMD64 long mode only. */
- %define X86_DR7_LEN_DWORD 3
- %define X86_DR7_LEN(iBp, cb) ( (cb) << ((iBp) * 4 + 18) )
--%define X86_DR7_ENABLED_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(6) | BIT(7))
-+%define X86_DR7_ENABLED_MASK (RT_BIT(0) | RT_BIT(1) | RT_BIT(2) | RT_BIT(3) | RT_BIT(4) | RT_BIT(6) | RT_BIT(7))
- %define MSR_IA32_FEATURE_CONTROL 0x3A
--%define MSR_IA32_FEATURE_CONTROL_LOCK BIT(0)
--%define MSR_IA32_FEATURE_CONTROL_VMXON BIT(2)
-+%define MSR_IA32_FEATURE_CONTROL_LOCK RT_BIT(0)
-+%define MSR_IA32_FEATURE_CONTROL_VMXON RT_BIT(2)
- %define MSR_IA32_SYSENTER_CS 0x174
- %define MSR_IA32_SYSENTER_ESP 0x175
- %define MSR_IA32_SYSENTER_EIP 0x176
-@@ -191,13 +191,13 @@
- %define MSR_IA32_VMX_CR4_FIXED1 0x489
- %define MSR_IA32_VMX_VMCS_ENUM 0x48A
- %define MSR_K6_EFER 0xc0000080
--%define MSR_K6_EFER_SCE BIT(0)
--%define MSR_K6_EFER_LME BIT(8)
--%define MSR_K6_EFER_LMA BIT(10)
--%define MSR_K6_EFER_NXE BIT(11)
--%define MSR_K6_EFER_SVME BIT(12)
--%define MSR_K6_EFER_LMSLE BIT(13)
--%define MSR_K6_EFER_FFXSR BIT(14)
-+%define MSR_K6_EFER_SCE RT_BIT(0)
-+%define MSR_K6_EFER_LME RT_BIT(8)
-+%define MSR_K6_EFER_LMA RT_BIT(10)
-+%define MSR_K6_EFER_NXE RT_BIT(11)
-+%define MSR_K6_EFER_SVME RT_BIT(12)
-+%define MSR_K6_EFER_LMSLE RT_BIT(13)
-+%define MSR_K6_EFER_FFXSR RT_BIT(14)
- %define MSR_K6_STAR 0xc0000081
- %define MSR_K6_STAR_SYSRET_CS_SS_SHIFT 48
- %define MSR_K6_STAR_SYSCALL_CS_SS_SHIFT 32
-@@ -251,80 +251,80 @@
- %define X86_PAGE_4M_OFFSET_MASK 0x003fffff
- %define X86_PAGE_4M_BASE_MASK 0xffffffffffc00000ULL
- %define X86_PAGE_4M_BASE_MASK_32 0xffc00000U
--%define X86_PTE_P BIT(0)
--%define X86_PTE_RW BIT(1)
--%define X86_PTE_US BIT(2)
--%define X86_PTE_PWT BIT(3)
--%define X86_PTE_PCD BIT(4)
--%define X86_PTE_A BIT(5)
--%define X86_PTE_D BIT(6)
--%define X86_PTE_PAT BIT(7)
--%define X86_PTE_G BIT(8)
--%define X86_PTE_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+%define X86_PTE_P RT_BIT(0)
-+%define X86_PTE_RW RT_BIT(1)
-+%define X86_PTE_US RT_BIT(2)
-+%define X86_PTE_PWT RT_BIT(3)
-+%define X86_PTE_PCD RT_BIT(4)
-+%define X86_PTE_A RT_BIT(5)
-+%define X86_PTE_D RT_BIT(6)
-+%define X86_PTE_PAT RT_BIT(7)
-+%define X86_PTE_G RT_BIT(8)
-+%define X86_PTE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- %define X86_PTE_PG_MASK ( 0xfffff000 )
- %define X86_PTE_PAE_PG_MASK ( 0x0000fffffffff000ULL )
- %define X86_PTE_PAE_PG_MASK ( 0x000ffffffffff000ULL )
--%define X86_PTE_PAE_NX BIT64(63)
-+%define X86_PTE_PAE_NX RT_BIT_64(63)
- %define X86_PT_SHIFT 12
- %define X86_PT_MASK 0x3ff
- %define X86_PT_PAE_SHIFT 12
- %define X86_PT_PAE_MASK 0x1ff
--%define X86_PDE_P BIT(0)
--%define X86_PDE_RW BIT(1)
--%define X86_PDE_US BIT(2)
--%define X86_PDE_PWT BIT(3)
--%define X86_PDE_PCD BIT(4)
--%define X86_PDE_A BIT(5)
--%define X86_PDE_PS BIT(7)
--%define X86_PDE_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+%define X86_PDE_P RT_BIT(0)
-+%define X86_PDE_RW RT_BIT(1)
-+%define X86_PDE_US RT_BIT(2)
-+%define X86_PDE_PWT RT_BIT(3)
-+%define X86_PDE_PCD RT_BIT(4)
-+%define X86_PDE_A RT_BIT(5)
-+%define X86_PDE_PS RT_BIT(7)
-+%define X86_PDE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- %define X86_PDE_PG_MASK ( 0xfffff000 )
- %define X86_PDE_PAE_PG_MASK ( 0x0000fffffffff000ULL )
- %define X86_PDE_PAE_PG_MASK ( 0x000ffffffffff000ULL )
--%define X86_PDE_PAE_NX BIT64(63)
--%define X86_PDE4M_P BIT(0)
--%define X86_PDE4M_RW BIT(1)
--%define X86_PDE4M_US BIT(2)
--%define X86_PDE4M_PWT BIT(3)
--%define X86_PDE4M_PCD BIT(4)
--%define X86_PDE4M_A BIT(5)
--%define X86_PDE4M_D BIT(6)
--%define X86_PDE4M_PS BIT(7)
--%define X86_PDE4M_G BIT(8)
--%define X86_PDE4M_AVL (BIT(9) | BIT(10) | BIT(11))
--%define X86_PDE4M_PAT BIT(12)
-+%define X86_PDE_PAE_NX RT_BIT_64(63)
-+%define X86_PDE4M_P RT_BIT(0)
-+%define X86_PDE4M_RW RT_BIT(1)
-+%define X86_PDE4M_US RT_BIT(2)
-+%define X86_PDE4M_PWT RT_BIT(3)
-+%define X86_PDE4M_PCD RT_BIT(4)
-+%define X86_PDE4M_A RT_BIT(5)
-+%define X86_PDE4M_D RT_BIT(6)
-+%define X86_PDE4M_PS RT_BIT(7)
-+%define X86_PDE4M_G RT_BIT(8)
-+%define X86_PDE4M_AVL (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
-+%define X86_PDE4M_PAT RT_BIT(12)
- %define X86_PDE4M_PAT_SHIFT (12 - 7)
- %define X86_PDE4M_PG_MASK ( 0xffc00000 )
- %define X86_PDE4M_PG_HIGH_MASK ( 0x001fe000 )
- %define X86_PDE4M_PG_HIGH_SHIFT 19
- %define X86_PDE4M_PAE_PG_MASK ( 0x000fffffffc00000ULL )
--%define X86_PDE4M_PAE_NX BIT64(63)
-+%define X86_PDE4M_PAE_NX RT_BIT_64(63)
- %define X86_PD_SHIFT 22
- %define X86_PD_MASK 0x3ff
- %define X86_PD_PAE_SHIFT 21
- %define X86_PD_PAE_MASK 0x1ff
--%define X86_PDPE_P BIT(0)
--%define X86_PDPE_RW BIT(1)
--%define X86_PDPE_US BIT(2)
--%define X86_PDPE_PWT BIT(3)
--%define X86_PDPE_PCD BIT(4)
--%define X86_PDPE_A BIT(5)
--%define X86_PDPE_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+%define X86_PDPE_P RT_BIT(0)
-+%define X86_PDPE_RW RT_BIT(1)
-+%define X86_PDPE_US RT_BIT(2)
-+%define X86_PDPE_PWT RT_BIT(3)
-+%define X86_PDPE_PCD RT_BIT(4)
-+%define X86_PDPE_A RT_BIT(5)
-+%define X86_PDPE_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- %define X86_PDPE_PG_MASK ( 0x0000fffffffff000ULL )
- %define X86_PDPE_PG_MASK ( 0x000ffffffffff000ULL )
--%define X86_PDPE_NX BIT64(63)
-+%define X86_PDPE_NX RT_BIT_64(63)
- %define X86_PDPTR_SHIFT 30
- %define X86_PDPTR_MASK_32 0x3
- %define X86_PDPTR_MASK 0x1ff
--%define X86_PML4E_P BIT(0)
--%define X86_PML4E_RW BIT(1)
--%define X86_PML4E_US BIT(2)
--%define X86_PML4E_PWT BIT(3)
--%define X86_PML4E_PCD BIT(4)
--%define X86_PML4E_A BIT(5)
--%define X86_PML4E_AVL_MASK (BIT(9) | BIT(10) | BIT(11))
-+%define X86_PML4E_P RT_BIT(0)
-+%define X86_PML4E_RW RT_BIT(1)
-+%define X86_PML4E_US RT_BIT(2)
-+%define X86_PML4E_PWT RT_BIT(3)
-+%define X86_PML4E_PCD RT_BIT(4)
-+%define X86_PML4E_A RT_BIT(5)
-+%define X86_PML4E_AVL_MASK (RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
- %define X86_PML4E_PG_MASK ( 0x0000fffffffff000ULL )
- %define X86_PML4E_PG_MASK ( 0x000ffffffffff000ULL )
--%define X86_PML4E_NX BIT64(63)
-+%define X86_PML4E_NX RT_BIT_64(63)
- %define X86_PML4_SHIFT 39
- %define X86_PML4_MASK 0x1ff
- %define X86_SEL_TYPE_CODE 8
-@@ -365,13 +365,13 @@
- %define X86_SEL_TYPE_SYS_UNDEFINED4 0xD
- %define X86_SEL_TYPE_SYS_386_INT_GATE 0xE
- %define X86_SEL_TYPE_SYS_386_TRAP_GATE 0xF
--%define X86_DESC_TYPE_MASK (BIT(8) | BIT(9) | BIT(10) | BIT(11))
--%define X86_DESC_S BIT(12)
--%define X86_DESC_DPL (BIT(13) | BIT(14))
--%define X86_DESC_P BIT(15)
--%define X86_DESC_AVL BIT(20)
--%define X86_DESC_DB BIT(22)
--%define X86_DESC_G BIT(23)
-+%define X86_DESC_TYPE_MASK (RT_BIT(8) | RT_BIT(9) | RT_BIT(10) | RT_BIT(11))
-+%define X86_DESC_S RT_BIT(12)
-+%define X86_DESC_DPL (RT_BIT(13) | RT_BIT(14))
-+%define X86_DESC_P RT_BIT(15)
-+%define X86_DESC_AVL RT_BIT(20)
-+%define X86_DESC_DB RT_BIT(22)
-+%define X86_DESC_G RT_BIT(23)
- %define X86_SEL_SHIFT 3
- %define X86_SEL_MASK 0xfff8
- %define X86_SEL_LDT 0x0004
-@@ -381,8 +381,8 @@
- %define X86_TRAP_ERR_TI 4
- %define X86_TRAP_ERR_SEL_MASK 0xfff8
- %define X86_TRAP_ERR_SEL_SHIFT 3
--%define X86_TRAP_PF_P BIT(0)
--%define X86_TRAP_PF_RW BIT(1)
--%define X86_TRAP_PF_US BIT(2)
--%define X86_TRAP_PF_RSVD BIT(3)
--%define X86_TRAP_PF_ID BIT(4)
-+%define X86_TRAP_PF_P RT_BIT(0)
-+%define X86_TRAP_PF_RW RT_BIT(1)
-+%define X86_TRAP_PF_US RT_BIT(2)
-+%define X86_TRAP_PF_RSVD RT_BIT(3)
-+%define X86_TRAP_PF_ID RT_BIT(4)
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/asm.h virtualbox-ose-1.5.2-dfsg2/include/iprt/asm.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/asm.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/asm.h 2007-12-18 14:54:48.000000000 +0000
-@@ -1999,7 +1999,7 @@ DECLASM(uint128_t) ASMAtomicXchgU128(vol
- # else
- DECLINLINE(uint128_t) ASMAtomicXchgU128(volatile uint128_t *pu128, uint128_t u128)
- {
-- if (true)/*ASMCpuId_ECX(1) & BIT(13))*/
-+ if (true)/*ASMCpuId_ECX(1) & RT_BIT(13))*/
- {
- /** @todo this is clumsy code */
- RTUINT128U u128Ret;
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/asmdefs.mac virtualbox-ose-1.5.2-dfsg2/include/iprt/asmdefs.mac
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/asmdefs.mac 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/asmdefs.mac 2007-12-18 14:54:48.000000000 +0000
-@@ -18,7 +18,7 @@
-
- ;;
- ; Make the mask for the given bit.
--%define BIT(bit) (1 << bit)
-+%define RT_BIT(bit) (1 << bit)
-
- ;;
- ; Align code, pad with INT3.
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/cdefs.h virtualbox-ose-1.5.2-dfsg2/include/iprt/cdefs.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/cdefs.h 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/cdefs.h 2007-12-18 14:54:48.000000000 +0000
-@@ -1036,12 +1036,6 @@
- * Define RT_NO_DEPRECATED_MACROS to not define deprecated macros.
- */
- #ifndef RT_NO_DEPRECATED_MACROS
--/** @copydoc BIT
-- * @deprecated Use RT_BIT.
-- */
--# define BIT(bit) RT_BIT(bit)
--/** @deprecated Use RT_BIT64. */
--# define BIT64(bit) (1ULL << (bit))
- /** @copydoc RT_ALIGN_P
- * @deprecated use RT_ALIGN_P. */
- # define ALIGNP(pv, uAlignment) RT_ALIGN_P(pv, uAlignment)
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/ldr.h virtualbox-ose-1.5.2-dfsg2/include/iprt/ldr.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/ldr.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/ldr.h 2007-12-18 14:54:48.000000000 +0000
-@@ -231,7 +231,7 @@ RTDECL(int) RTLdrEnumSymbols(RTLDRMOD hL
- /** @name RTLdrEnumSymbols flags.
- * @{ */
- /** Returns ALL kinds of symbols. The default is to only return public/exported symbols. */
--#define RTLDR_ENUM_SYMBOL_FLAGS_ALL BIT(1)
-+#define RTLDR_ENUM_SYMBOL_FLAGS_ALL RT_BIT(1)
- /** @} */
-
- __END_DECLS
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/path.h virtualbox-ose-1.5.2-dfsg2/include/iprt/path.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/path.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/path.h 2007-12-18 14:54:48.000000000 +0000
-@@ -482,7 +482,7 @@ RTR3DECL(int) RTPathGetOwner(const char
- /** @name RTPathRename, RTDirRename & RTFileRename flags.
- * @{ */
- /** This will replace attempt any target which isn't a directory. */
--#define RTPATHRENAME_FLAGS_REPLACE BIT(0)
-+#define RTPATHRENAME_FLAGS_REPLACE RT_BIT(0)
- /** @} */
-
- /**
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/string.h virtualbox-ose-1.5.2-dfsg2/include/iprt/string.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/string.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/string.h 2007-12-18 14:54:48.000000000 +0000
-@@ -325,7 +325,7 @@ RTDECL(char *) RTStrPutCpInternal(char *
- DECLINLINE(RTUNICP) RTStrGetCp(const char *psz)
- {
- const unsigned char uch = *(const unsigned char *)psz;
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- return uch;
- return RTStrGetCpInternal(psz);
- }
-@@ -346,7 +346,7 @@ DECLINLINE(RTUNICP) RTStrGetCp(const cha
- DECLINLINE(int) RTStrGetCpEx(const char **ppsz, PRTUNICP pCp)
- {
- const unsigned char uch = **(const unsigned char **)ppsz;
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- {
- (*ppsz)++;
- *pCp = uch;
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/thread.h virtualbox-ose-1.5.2-dfsg2/include/iprt/thread.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/thread.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/thread.h 2007-12-18 14:54:48.000000000 +0000
-@@ -172,12 +172,12 @@ typedef enum RTTHREADFLAGS
- * This flag is used to keep the thread structure around so it can
- * be waited on after termination.
- */
-- RTTHREADFLAGS_WAITABLE = BIT(0),
-+ RTTHREADFLAGS_WAITABLE = RT_BIT(0),
- /** The bit number corresponding to the RTTHREADFLAGS_WAITABLE mask. */
- RTTHREADFLAGS_WAITABLE_BIT = 0,
-
- /** Mask of valid flags, use for validation. */
-- RTTHREADFLAGS_MASK = BIT(0)
-+ RTTHREADFLAGS_MASK = RT_BIT(0)
- } RTTHREADFLAGS;
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/time.h virtualbox-ose-1.5.2-dfsg2/include/iprt/time.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/time.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/time.h 2007-12-18 14:54:48.000000000 +0000
-@@ -568,15 +568,15 @@ typedef const RTTIME *PCRTTIME;
-
- /** Set if the time is local and daylight saving time is in effect.
- * Not bit is not valid if RTTIME_FLAGS_NO_DST_DATA is set. */
--#define RTTIME_FLAGS_DST BIT(4)
-+#define RTTIME_FLAGS_DST RT_BIT(4)
- /** Set if the time is local and there is no data available on daylight saving time. */
--#define RTTIME_FLAGS_NO_DST_DATA BIT(5)
-+#define RTTIME_FLAGS_NO_DST_DATA RT_BIT(5)
- /** Set if the year is a leap year.
- * This is mutual exclusiv with RTTIME_FLAGS_COMMON_YEAR. */
--#define RTTIME_FLAGS_LEAP_YEAR BIT(6)
-+#define RTTIME_FLAGS_LEAP_YEAR RT_BIT(6)
- /** Set if the year is a common year.
- * This is mutual exclusiv with RTTIME_FLAGS_LEAP_YEAR. */
--#define RTTIME_FLAGS_COMMON_YEAR BIT(7)
-+#define RTTIME_FLAGS_COMMON_YEAR RT_BIT(7)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/timer.h virtualbox-ose-1.5.2-dfsg2/include/iprt/timer.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/timer.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/timer.h 2007-12-18 14:54:48.000000000 +0000
-@@ -105,7 +105,7 @@ RTDECL(int) RTTimerCreateEx(PRTTIMER *pp
- /** Any CPU is fine. (Must be 0.) */
- #define RTTIMER_FLAGS_CPU_ANY 0
- /** One specific CPU */
--#define RTTIMER_FLAGS_CPU_SPECIFIC BIT(8)
-+#define RTTIMER_FLAGS_CPU_SPECIFIC RT_BIT(8)
- /** All online CPUs. */
- #define RTTIMER_FLAGS_CPU_ALL ( RTTIMER_FLAGS_CPU_MASK | RTTIMER_FLAGS_CPU_SPECIFIC )
- /** CPU mask. */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/types.h virtualbox-ose-1.5.2-dfsg2/include/iprt/types.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/types.h 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/types.h 2007-12-18 14:54:48.000000000 +0000
-@@ -58,8 +58,9 @@
- /*
- * Kludge for the linux kernel:
- * 1. sys/types.h doesn't mix with the kernel.
-- * 2. Starting with 2.6.19 linux/types.h typedefs bool and linux/stddef.h
-+ * 2. Starting with 2.6.19, linux/types.h typedefs bool and linux/stddef.h
- * declares false and true as enum values.
-+ * 3. Starting with 2.6.24, linux/types.h typedefs uintptr_t.
- * We work around these issues here and nowhere else.
- */
- # include <stddef.h>
-@@ -69,8 +70,11 @@
- # define bool linux_bool
- # define true linux_true
- # define false linux_false
-+# define uintptr_t linux_uintptr_t
-+# include <linux/autoconf.h>
- # include <linux/types.h>
- # include <linux/stddef.h>
-+# undef uintptr_t
- # undef false
- # undef true
- # undef bool
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/uni.h virtualbox-ose-1.5.2-dfsg2/include/iprt/uni.h
---- virtualbox-ose-1.5.2-dfsg2.orig/include/iprt/uni.h 2007-08-30 15:16:21.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/include/iprt/uni.h 2007-12-18 14:54:48.000000000 +0000
-@@ -91,13 +91,13 @@ typedef const RTUNICASERANGE *PCRTUNICAS
- /** @name Unicode Code Point Flags.
- * @internal
- * @{ */
--#define RTUNI_UPPER BIT(0)
--#define RTUNI_LOWER BIT(1)
--#define RTUNI_ALPHA BIT(2)
--#define RTUNI_XDIGIT BIT(3)
--#define RTUNI_DDIGIT BIT(4)
--#define RTUNI_WSPACE BIT(5)
--/*#define RTUNI_BSPACE BIT(6) - later */
-+#define RTUNI_UPPER RT_BIT(0)
-+#define RTUNI_LOWER RT_BIT(1)
-+#define RTUNI_ALPHA RT_BIT(2)
-+#define RTUNI_XDIGIT RT_BIT(3)
-+#define RTUNI_DDIGIT RT_BIT(4)
-+#define RTUNI_WSPACE RT_BIT(5)
-+/*#define RTUNI_BSPACE RT_BIT(6) - later */
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Debugger/DBGConsole.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Debugger/DBGConsole.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Debugger/DBGConsole.cpp 2007-08-30 15:16:25.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Debugger/DBGConsole.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -886,10 +886,10 @@ static uint32_t g_bmOperatorChars[256 /
- * @{
- */
- /** If set the register set is the hypervisor and not the guest one. */
--#define SYMREG_FLAGS_HYPER BIT(20)
-+#define SYMREG_FLAGS_HYPER RT_BIT(20)
- /** If set a far conversion of the value will use the high 16 bit for the selector.
- * If clear the low 16 bit will be used. */
--#define SYMREG_FLAGS_HIGH_SEL BIT(21)
-+#define SYMREG_FLAGS_HIGH_SEL RT_BIT(21)
- /** The shift value to calc the size of a register symbol from the uUser value. */
- #define SYMREG_SIZE_SHIFT (24)
- /** Get the offset */
-@@ -2576,7 +2576,7 @@ static int dbgcCmdDumpDTWorker32(PDBGCCM
- "ConfER", /* E Conforming, Execute/Readable */
- "ConfER" /* F Conforming, Execute/Readable - Accessed */
- };
-- const char *pszAccessed = pDesc->Gen.u4Type & BIT(0) ? "A " : "NA";
-+ const char *pszAccessed = pDesc->Gen.u4Type & RT_BIT(0) ? "A " : "NA";
- const char *pszGranularity = pDesc->Gen.u1Granularity ? "G" : " ";
- const char *pszBig = pDesc->Gen.u1DefBig ? "BIG" : " ";
- uint32_t u32Base = pDesc->Gen.u16BaseLow
-@@ -2631,7 +2631,7 @@ static int dbgcCmdDumpDTWorker32(PDBGCCM
- case X86_SEL_TYPE_SYS_LDT:
- {
- const char *pszGranularity = pDesc->Gen.u1Granularity ? "G" : " ";
-- const char *pszBusy = pDesc->Gen.u4Type & BIT(1) ? "B " : "NB";
-+ const char *pszBusy = pDesc->Gen.u4Type & RT_BIT(1) ? "B " : "NB";
- const char *pszBig = pDesc->Gen.u1DefBig ? "BIG" : " ";
- uint32_t u32Base = pDesc->Gen.u16BaseLow
- | ((uint32_t)pDesc->Gen.u8BaseHigh1 << 16)
-@@ -2660,7 +2660,7 @@ static int dbgcCmdDumpDTWorker32(PDBGCCM
- case X86_SEL_TYPE_SYS_386_CALL_GATE:
- {
- unsigned cParams = pDesc->au8[0] & 0x1f;
-- const char *pszCountOf = pDesc->Gen.u4Type & BIT(3) ? "DC" : "WC";
-+ const char *pszCountOf = pDesc->Gen.u4Type & RT_BIT(3) ? "DC" : "WC";
- RTSEL sel = pDesc->au16[1];
- uint32_t off = pDesc->au16[0] | ((uint32_t)pDesc->au16[3] << 16);
- rc = pCmdHlp->pfnPrintf(pCmdHlp, NULL, "%04x %s Sel:Off=%04x:%08x DPL=%d %s %s=%d%s\n",
-@@ -3429,12 +3429,12 @@ static DECLCALLBACK(int) dbgcCmdDumpPage
- Pde.n.u1Write ? "w" : "r",
- Pde.n.u1User ? "u" : "s",
- Pde.n.u1Accessed ? "a " : "na",
-- Pde.u & BIT(6) ? "6 " : " ",
-+ Pde.u & RT_BIT(6) ? "6 " : " ",
- Pde.n.u3Available,
-- Pde.u & BIT(8) ? "8" : " ",
-+ Pde.u & RT_BIT(8) ? "8" : " ",
- Pde.n.u1WriteThru ? "pwt" : " ",
- Pde.n.u1CacheDisable ? "pcd" : " ",
-- Pde.u & BIT(7) ? "7" : "",
-+ Pde.u & RT_BIT(7) ? "7" : "",
- Pde.n.u1NoExecute ? (fNXE ? "nx" : "NX") : " ");
- if (Pde.u & UINT64_C(0x7fff000000000000))
- DBGCCmdHlpPrintf(pCmdHlp, " weird=%RX64", (Pde.u & UINT64_C(0x7fff000000000000)));
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Audio/DevIchAc97.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Audio/DevIchAc97.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Audio/DevIchAc97.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Audio/DevIchAc97.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -79,45 +79,45 @@ enum {
- #else
- #undef SOFT_VOLUME
- #endif
--#define SR_FIFOE BIT(4) /* rwc, fifo error */
--#define SR_BCIS BIT(3) /* rwc, buffer completion interrupt status */
--#define SR_LVBCI BIT(2) /* rwc, last valid buffer completion interrupt */
--#define SR_CELV BIT(1) /* ro, current equals last valid */
--#define SR_DCH BIT(0) /* ro, controller halted */
--#define SR_VALID_MASK (BIT(5) - 1)
-+#define SR_FIFOE RT_BIT(4) /* rwc, fifo error */
-+#define SR_BCIS RT_BIT(3) /* rwc, buffer completion interrupt status */
-+#define SR_LVBCI RT_BIT(2) /* rwc, last valid buffer completion interrupt */
-+#define SR_CELV RT_BIT(1) /* ro, current equals last valid */
-+#define SR_DCH RT_BIT(0) /* ro, controller halted */
-+#define SR_VALID_MASK (RT_BIT(5) - 1)
- #define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
- #define SR_RO_MASK (SR_DCH | SR_CELV)
- #define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
-
--#define CR_IOCE BIT(4) /* rw */
--#define CR_FEIE BIT(3) /* rw */
--#define CR_LVBIE BIT(2) /* rw */
--#define CR_RR BIT(1) /* rw */
--#define CR_RPBM BIT(0) /* rw */
--#define CR_VALID_MASK (BIT(5) - 1)
-+#define CR_IOCE RT_BIT(4) /* rw */
-+#define CR_FEIE RT_BIT(3) /* rw */
-+#define CR_LVBIE RT_BIT(2) /* rw */
-+#define CR_RR RT_BIT(1) /* rw */
-+#define CR_RPBM RT_BIT(0) /* rw */
-+#define CR_VALID_MASK (RT_BIT(5) - 1)
- #define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
-
- #define GC_WR 4 /* rw */
- #define GC_CR 2 /* rw */
--#define GC_VALID_MASK (BIT(6) - 1)
-+#define GC_VALID_MASK (RT_BIT(6) - 1)
-
--#define GS_MD3 BIT(17) /* rw */
--#define GS_AD3 BIT(16) /* rw */
--#define GS_RCS BIT(15) /* rwc */
--#define GS_B3S12 BIT(14) /* ro */
--#define GS_B2S12 BIT(13) /* ro */
--#define GS_B1S12 BIT(12) /* ro */
--#define GS_S1R1 BIT(11) /* rwc */
--#define GS_S0R1 BIT(10) /* rwc */
--#define GS_S1CR BIT(9) /* ro */
--#define GS_S0CR BIT(8) /* ro */
--#define GS_MINT BIT(7) /* ro */
--#define GS_POINT BIT(6) /* ro */
--#define GS_PIINT BIT(5) /* ro */
--#define GS_RSRVD (BIT(4)|BIT(3))
--#define GS_MOINT BIT(2) /* ro */
--#define GS_MIINT BIT(1) /* ro */
--#define GS_GSCI BIT(0) /* rwc */
-+#define GS_MD3 RT_BIT(17) /* rw */
-+#define GS_AD3 RT_BIT(16) /* rw */
-+#define GS_RCS RT_BIT(15) /* rwc */
-+#define GS_B3S12 RT_BIT(14) /* ro */
-+#define GS_B2S12 RT_BIT(13) /* ro */
-+#define GS_B1S12 RT_BIT(12) /* ro */
-+#define GS_S1R1 RT_BIT(11) /* rwc */
-+#define GS_S0R1 RT_BIT(10) /* rwc */
-+#define GS_S1CR RT_BIT(9) /* ro */
-+#define GS_S0CR RT_BIT(8) /* ro */
-+#define GS_MINT RT_BIT(7) /* ro */
-+#define GS_POINT RT_BIT(6) /* ro */
-+#define GS_PIINT RT_BIT(5) /* ro */
-+#define GS_RSRVD (RT_BIT(4)|RT_BIT(3))
-+#define GS_MOINT RT_BIT(2) /* ro */
-+#define GS_MIINT RT_BIT(1) /* ro */
-+#define GS_GSCI RT_BIT(0) /* rwc */
- #define GS_RO_MASK (GS_B3S12| \
- GS_B2S12| \
- GS_B1S12| \
-@@ -129,12 +129,12 @@ enum {
- GS_RSRVD| \
- GS_MOINT| \
- GS_MIINT)
--#define GS_VALID_MASK (BIT(18) - 1)
-+#define GS_VALID_MASK (RT_BIT(18) - 1)
- #define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
-
- /** Buffer Descriptor */
--#define BD_IOC BIT(31) /* Interrupt on Completion */
--#define BD_BUP BIT(30) /* Buffer Underrun Policy */
-+#define BD_IOC RT_BIT(31) /* Interrupt on Completion */
-+#define BD_BUP RT_BIT(30) /* Buffer Underrun Policy */
-
- #define EACS_VRA 1
- #define EACS_VRM 8
-@@ -212,8 +212,8 @@ typedef struct AC97LinkState
-
- enum
- {
-- BUP_SET = BIT(0),
-- BUP_LAST = BIT(1)
-+ BUP_SET = RT_BIT(0),
-+ BUP_LAST = RT_BIT(1)
- };
-
- typedef struct PCIAC97LinkState
-@@ -512,10 +512,10 @@ static void set_volume (AC97LinkState *s
- *
- * Linux ALSA depends on this behavior.
- */
-- if (val & BIT(5))
-- val |= BIT(4) | BIT(3) | BIT(2) | BIT(1) | BIT(0);
-- if (val & BIT(13))
-- val |= BIT(12) | BIT(11) | BIT(10) | BIT(9) | BIT(8);
-+ if (val & RT_BIT(5))
-+ val |= RT_BIT(4) | RT_BIT(3) | RT_BIT(2) | RT_BIT(1) | RT_BIT(0);
-+ if (val & RT_BIT(13))
-+ val |= RT_BIT(12) | RT_BIT(11) | RT_BIT(10) | RT_BIT(9) | RT_BIT(8);
- #endif
-
- mixer_store (s, index, val);
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Network/DevPCNet.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Network/DevPCNet.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Network/DevPCNet.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Network/DevPCNet.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -1900,7 +1900,7 @@ static void pcnetXmitFailTMDLinkDown(PCN
- /* make carrier error - hope this is correct. */
- pData->cLinkDownReported++;
- pTmd->tmd2.lcar = pTmd->tmd1.err = 1;
-- pData->aCSR[0] |= BIT(15) | BIT(13); /* ERR | CERR */
-+ pData->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR */
- pData->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;
- Log(("#%d pcnetTransmit: Signaling send error. swstyle=%#x\n",
- PCNETSTATE_2_DEVINS(pData)->iInstance, pData->aBCR[BCR_SWS]));
-@@ -1913,7 +1913,7 @@ static void pcnetXmitFailTMDGeneric(PCNe
- {
- /* make carrier error - hope this is correct. */
- pTmd->tmd2.lcar = pTmd->tmd1.err = 1;
-- pData->aCSR[0] |= BIT(15) | BIT(13); /* ERR | CERR */
-+ pData->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR */
- pData->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;
- Log(("#%d pcnetTransmit: Signaling send error. swstyle=%#x\n",
- PCNETSTATE_2_DEVINS(pData)->iInstance, pData->aBCR[BCR_SWS]));
-@@ -3513,7 +3513,7 @@ static DECLCALLBACK(void) pcnetTimerRest
- pDevIns->iInstance));
- Log(("#%d pcnetTimerRestore: Clearing ERR and CERR after load. cLinkDownReported=%d\n",
- pDevIns->iInstance, pData->cLinkDownReported));
-- pData->aCSR[0] &= ~(BIT(15) | BIT(13)); /* ERR | CERR - probably not 100% correct either... */
-+ pData->aCSR[0] &= ~(RT_BIT(15) | RT_BIT(13)); /* ERR | CERR - probably not 100% correct either... */
- pData->Led.Actual.s.fError = 0;
- }
- }
-@@ -3664,18 +3664,18 @@ static DECLCALLBACK(void) pcnetInfo(PPDM
- pHlp->pfnPrintf(pHlp,
- "CSR3=%#06x: BSWP=%d EMBA=%d DXMT2PD=%d LAPPEN=%d DXSUFLO=%d IDONM=%d TINTM=%d RINTM=%d MERRM=%d MISSM=%d BABLM=%d\n",
- pData->aCSR[3],
-- !!(pData->aCSR[3] & BIT(2)), !!(pData->aCSR[3] & BIT(3)), !!(pData->aCSR[3] & BIT(4)), CSR_LAPPEN(pData),
-- CSR_DXSUFLO(pData), !!(pData->aCSR[3] & BIT(8)), !!(pData->aCSR[3] & BIT(9)), !!(pData->aCSR[3] & BIT(10)),
-- !!(pData->aCSR[3] & BIT(11)), !!(pData->aCSR[3] & BIT(12)), !!(pData->aCSR[3] & BIT(14)));
-+ !!(pData->aCSR[3] & RT_BIT(2)), !!(pData->aCSR[3] & RT_BIT(3)), !!(pData->aCSR[3] & RT_BIT(4)), CSR_LAPPEN(pData),
-+ CSR_DXSUFLO(pData), !!(pData->aCSR[3] & RT_BIT(8)), !!(pData->aCSR[3] & RT_BIT(9)), !!(pData->aCSR[3] & RT_BIT(10)),
-+ !!(pData->aCSR[3] & RT_BIT(11)), !!(pData->aCSR[3] & RT_BIT(12)), !!(pData->aCSR[3] & RT_BIT(14)));
-
- pHlp->pfnPrintf(pHlp,
- "CSR4=%#06x: JABM=%d JAB=%d TXSTRM=%d TXSTRT=%d RCVCOOM=%d RCVCCO=%d UINT=%d UINTCMD=%d\n"
- " MFCOM=%d MFCO=%d ASTRP_RCV=%d APAD_XMT=%d DPOLL=%d TIMER=%d EMAPLUS=%d EN124=%d\n",
- pData->aCSR[4],
-- !!(pData->aCSR[4] & BIT( 0)), !!(pData->aCSR[4] & BIT( 1)), !!(pData->aCSR[4] & BIT( 2)), !!(pData->aCSR[4] & BIT( 3)),
-- !!(pData->aCSR[4] & BIT( 4)), !!(pData->aCSR[4] & BIT( 5)), !!(pData->aCSR[4] & BIT( 6)), !!(pData->aCSR[4] & BIT( 7)),
-- !!(pData->aCSR[4] & BIT( 8)), !!(pData->aCSR[4] & BIT( 9)), !!(pData->aCSR[4] & BIT(10)), !!(pData->aCSR[4] & BIT(11)),
-- !!(pData->aCSR[4] & BIT(12)), !!(pData->aCSR[4] & BIT(13)), !!(pData->aCSR[4] & BIT(14)), !!(pData->aCSR[4] & BIT(15)));
-+ !!(pData->aCSR[4] & RT_BIT( 0)), !!(pData->aCSR[4] & RT_BIT( 1)), !!(pData->aCSR[4] & RT_BIT( 2)), !!(pData->aCSR[4] & RT_BIT( 3)),
-+ !!(pData->aCSR[4] & RT_BIT( 4)), !!(pData->aCSR[4] & RT_BIT( 5)), !!(pData->aCSR[4] & RT_BIT( 6)), !!(pData->aCSR[4] & RT_BIT( 7)),
-+ !!(pData->aCSR[4] & RT_BIT( 8)), !!(pData->aCSR[4] & RT_BIT( 9)), !!(pData->aCSR[4] & RT_BIT(10)), !!(pData->aCSR[4] & RT_BIT(11)),
-+ !!(pData->aCSR[4] & RT_BIT(12)), !!(pData->aCSR[4] & RT_BIT(13)), !!(pData->aCSR[4] & RT_BIT(14)), !!(pData->aCSR[4] & RT_BIT(15)));
-
- pHlp->pfnPrintf(pHlp,
- "CSR5=%#06x:\n",
-@@ -3708,10 +3708,10 @@ static DECLCALLBACK(void) pcnetInfo(PPDM
- "CSR15=%#06x: DXR=%d DTX=%d LOOP=%d DXMTFCS=%d FCOLL=%d DRTY=%d INTL=%d PORTSEL=%d LTR=%d\n"
- " MENDECL=%d DAPC=%d DLNKTST=%d DRCVPV=%d DRCVBC=%d PROM=%d\n",
- pData->aCSR[15],
-- !!(pData->aCSR[15] & BIT( 0)), !!(pData->aCSR[15] & BIT( 1)), !!(pData->aCSR[15] & BIT( 2)), !!(pData->aCSR[15] & BIT( 3)),
-- !!(pData->aCSR[15] & BIT( 4)), !!(pData->aCSR[15] & BIT( 5)), !!(pData->aCSR[15] & BIT( 6)), (pData->aCSR[15] >> 7) & 3,
-- !!(pData->aCSR[15] & BIT( 9)), !!(pData->aCSR[15] & BIT(10)), !!(pData->aCSR[15] & BIT(11)),
-- !!(pData->aCSR[15] & BIT(12)), !!(pData->aCSR[15] & BIT(13)), !!(pData->aCSR[15] & BIT(14)), !!(pData->aCSR[15] & BIT(15)));
-+ !!(pData->aCSR[15] & RT_BIT( 0)), !!(pData->aCSR[15] & RT_BIT( 1)), !!(pData->aCSR[15] & RT_BIT( 2)), !!(pData->aCSR[15] & RT_BIT( 3)),
-+ !!(pData->aCSR[15] & RT_BIT( 4)), !!(pData->aCSR[15] & RT_BIT( 5)), !!(pData->aCSR[15] & RT_BIT( 6)), (pData->aCSR[15] >> 7) & 3,
-+ !!(pData->aCSR[15] & RT_BIT( 9)), !!(pData->aCSR[15] & RT_BIT(10)), !!(pData->aCSR[15] & RT_BIT(11)),
-+ !!(pData->aCSR[15] & RT_BIT(12)), !!(pData->aCSR[15] & RT_BIT(13)), !!(pData->aCSR[15] & RT_BIT(14)), !!(pData->aCSR[15] & RT_BIT(15)));
-
- pHlp->pfnPrintf(pHlp,
- "CSR46=%#06x: POLL=%#06x (Poll Time Counter)\n",
-@@ -3730,7 +3730,7 @@ static DECLCALLBACK(void) pcnetInfo(PPDM
- : (pData->aCSR[58] & 0x7f) == 2 ? "PCNet-PCI II"
- : (pData->aCSR[58] & 0x7f) == 3 ? "PCNet-PCI II controller"
- : "!!reserved!!",
-- !!(pData->aCSR[58] & BIT(8)), !!(pData->aCSR[58] & BIT(9)), !!(pData->aCSR[58] & BIT(10)));
-+ !!(pData->aCSR[58] & RT_BIT(8)), !!(pData->aCSR[58] & RT_BIT(9)), !!(pData->aCSR[58] & RT_BIT(10)));
-
- pHlp->pfnPrintf(pHlp,
- "CSR112=%04RX32: MFC=%04x (Missed receive Frame Count)\n",
-@@ -3738,11 +3738,11 @@ static DECLCALLBACK(void) pcnetInfo(PPDM
-
- pHlp->pfnPrintf(pHlp,
- "CSR122=%04RX32: RCVALGN=%04x (Receive Frame Align)\n",
-- pData->aCSR[122], !!(pData->aCSR[122] & BIT(0)));
-+ pData->aCSR[122], !!(pData->aCSR[122] & RT_BIT(0)));
-
- pHlp->pfnPrintf(pHlp,
- "CSR124=%04RX32: RPA=%04x (Runt Packet Accept)\n",
-- pData->aCSR[122], !!(pData->aCSR[122] & BIT(3)));
-+ pData->aCSR[122], !!(pData->aCSR[122] & RT_BIT(3)));
-
-
- /*
-@@ -3955,7 +3955,7 @@ static DECLCALLBACK(int) pcnetLoadExec(P
- {
- pData->fLinkTempDown = true;
- pData->cLinkDownReported = 0;
-- pData->aCSR[0] |= BIT(15) | BIT(13); /* ERR | CERR (this is probably wrong) */
-+ pData->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR (this is probably wrong) */
- pData->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;
- return TMTimerSetMillies(pData->pTimerRestore, 5000);
- }
-@@ -4120,14 +4120,14 @@ static DECLCALLBACK(int) pcnetSetLinkSta
- if (fLinkUp)
- {
- /* connect */
-- pData->aCSR[0] &= ~(BIT(15) | BIT(13)); /* ERR | CERR - probably not 100% correct either... */
-+ pData->aCSR[0] &= ~(RT_BIT(15) | RT_BIT(13)); /* ERR | CERR - probably not 100% correct either... */
- pData->Led.Actual.s.fError = 0;
- }
- else
- {
- /* disconnect */
- pData->cLinkDownReported = 0;
-- pData->aCSR[0] |= BIT(15) | BIT(13); /* ERR | CERR (this is probably wrong) */
-+ pData->aCSR[0] |= RT_BIT(15) | RT_BIT(13); /* ERR | CERR (this is probably wrong) */
- pData->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;
- }
- Assert(!PDMCritSectIsOwner(&pData->CritSect));
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/PC/DevACPI.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/PC/DevACPI.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/PC/DevACPI.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/PC/DevACPI.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -64,44 +64,44 @@
- #define ACPI_RESET_BLK 0x00004050
-
- /* PM1x status register bits */
--#define TMR_STS BIT(0)
--#define RSR1_STS (BIT(1) | BIT(2) | BIT(3))
--#define BM_STS BIT(4)
--#define GBL_STS BIT(5)
--#define RSR2_STS (BIT(6) | BIT(7))
--#define PWRBTN_STS BIT(8)
--#define SLPBTN_STS BIT(9)
--#define RTC_STS BIT(10)
--#define IGN_STS BIT(11)
--#define RSR3_STS (BIT(12) | BIT(13) | BIT(14))
--#define WAK_STS BIT(15)
-+#define TMR_STS RT_BIT(0)
-+#define RSR1_STS (RT_BIT(1) | RT_BIT(2) | RT_BIT(3))
-+#define BM_STS RT_BIT(4)
-+#define GBL_STS RT_BIT(5)
-+#define RSR2_STS (RT_BIT(6) | RT_BIT(7))
-+#define PWRBTN_STS RT_BIT(8)
-+#define SLPBTN_STS RT_BIT(9)
-+#define RTC_STS RT_BIT(10)
-+#define IGN_STS RT_BIT(11)
-+#define RSR3_STS (RT_BIT(12) | RT_BIT(13) | RT_BIT(14))
-+#define WAK_STS RT_BIT(15)
- #define RSR_STS (RSR1_STS | RSR2_STS | RSR3_STS)
-
- /* PM1x enable register bits */
--#define TMR_EN BIT(0)
--#define RSR1_EN (BIT(1) | BIT(2) | BIT(3) | BIT(4))
--#define GBL_EN BIT(5)
--#define RSR2_EN (BIT(6) | BIT(7))
--#define PWRBTN_EN BIT(8)
--#define SLPBTN_EN BIT(9)
--#define RTC_EN BIT(10)
--#define RSR3_EN (BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(15))
-+#define TMR_EN RT_BIT(0)
-+#define RSR1_EN (RT_BIT(1) | RT_BIT(2) | RT_BIT(3) | RT_BIT(4))
-+#define GBL_EN RT_BIT(5)
-+#define RSR2_EN (RT_BIT(6) | RT_BIT(7))
-+#define PWRBTN_EN RT_BIT(8)
-+#define SLPBTN_EN RT_BIT(9)
-+#define RTC_EN RT_BIT(10)
-+#define RSR3_EN (RT_BIT(11) | RT_BIT(12) | RT_BIT(13) | RT_BIT(14) | RT_BIT(15))
- #define RSR_EN (RSR1_EN | RSR2_EN | RSR3_EN)
- #define IGN_EN 0
-
- /* PM1x control register bits */
--#define SCI_EN BIT(0)
--#define BM_RLD BIT(1)
--#define GBL_RLS BIT(2)
--#define RSR1_CNT (BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8))
--#define IGN_CNT BIT(9)
-+#define SCI_EN RT_BIT(0)
-+#define BM_RLD RT_BIT(1)
-+#define GBL_RLS RT_BIT(2)
-+#define RSR1_CNT (RT_BIT(3) | RT_BIT(4) | RT_BIT(5) | RT_BIT(6) | RT_BIT(7) | RT_BIT(8))
-+#define IGN_CNT RT_BIT(9)
- #define SLP_TYPx_SHIFT 10
- #define SLP_TYPx_MASK 7
--#define SLP_EN BIT(13)
--#define RSR2_CNT (BIT(14) | BIT(15))
-+#define SLP_EN RT_BIT(13)
-+#define RSR2_CNT (RT_BIT(14) | RT_BIT(15))
- #define RSR_CNT (RSR1_CNT | RSR2_CNT)
-
--#define GPE0_BATTERY_INFO_CHANGED BIT (0)
-+#define GPE0_BATTERY_INFO_CHANGED RT_BIT(0)
-
- enum
- {
-@@ -138,15 +138,15 @@ enum
- #define BAT_TECH_PRIMARY 1
- #define BAT_TECH_SECONDARY 2
-
--#define BAT_STATUS_DISCHARGING_MASK BIT (0)
--#define BAT_STATUS_CHARGING_MASK BIT (1)
--#define BAT_STATUS_CRITICAL_MASK BIT (2)
--
--#define STA_DEVICE_PRESENT_MASK BIT (0)
--#define STA_DEVICE_ENABLED_MASK BIT (1)
--#define STA_DEVICE_SHOW_IN_UI_MASK BIT (2)
--#define STA_DEVICE_FUNCTIONING_PROPERLY_MASK BIT (3)
--#define STA_BATTERY_PRESENT_MASK BIT (4)
-+#define BAT_STATUS_DISCHARGING_MASK RT_BIT(0)
-+#define BAT_STATUS_CHARGING_MASK RT_BIT(1)
-+#define BAT_STATUS_CRITICAL_MASK RT_BIT(2)
-+
-+#define STA_DEVICE_PRESENT_MASK RT_BIT(0)
-+#define STA_DEVICE_ENABLED_MASK RT_BIT(1)
-+#define STA_DEVICE_SHOW_IN_UI_MASK RT_BIT(2)
-+#define STA_DEVICE_FUNCTIONING_PROPERLY_MASK RT_BIT(3)
-+#define STA_BATTERY_PRESENT_MASK RT_BIT(4)
-
- struct ACPIState
- {
-@@ -308,32 +308,32 @@ struct ACPITBLFADT
- uint8_t u8MonAlarm; /**< RTC CMOS RAM index of month-of-year alarm */
- uint8_t u8Century; /**< RTC CMOS RAM index of century */
- uint16_t u16IAPCBOOTARCH; /**< IA-PC boot architecture flags */
--#define IAPC_BOOT_ARCH_LEGACY_DEV BIT(0) /**< legacy devices present such as LPT
-+#define IAPC_BOOT_ARCH_LEGACY_DEV RT_BIT(0) /**< legacy devices present such as LPT
- (COM too?) */
--#define IAPC_BOOT_ARCH_8042 BIT(1) /**< legacy keyboard device present */
--#define IAPC_BOOT_ARCH_NO_VGA BIT(2) /**< VGA not present */
-+#define IAPC_BOOT_ARCH_8042 RT_BIT(1) /**< legacy keyboard device present */
-+#define IAPC_BOOT_ARCH_NO_VGA RT_BIT(2) /**< VGA not present */
- uint8_t u8Must0_0; /**< must be 0 */
- uint32_t u32Flags; /**< fixed feature flags */
--#define FADT_FL_WBINVD BIT(0) /**< emulation of WBINVD available */
--#define FADT_FL_WBINVD_FLUSH BIT(1)
--#define FADT_FL_PROC_C1 BIT(2) /**< 1=C1 supported on all processors */
--#define FADT_FL_P_LVL2_UP BIT(3) /**< 1=C2 works on SMP and UNI systems */
--#define FADT_FL_PWR_BUTTON BIT(4) /**< 1=power button handled as ctrl method dev */
--#define FADT_FL_SLP_BUTTON BIT(5) /**< 1=sleep button handled as ctrl method dev */
--#define FADT_FL_FIX_RTC BIT(6) /**< 0=RTC wake status in fixed register */
--#define FADT_FL_RTC_S4 BIT(7) /**< 1=RTC can wake system from S4 */
--#define FADT_FL_TMR_VAL_EXT BIT(8) /**< 1=TMR_VAL implemented as 32 bit */
--#define FADT_FL_DCK_CAP BIT(9) /**< 0=system cannot support docking */
--#define FADT_FL_RESET_REG_SUP BIT(10) /**< 1=system supports system resets */
--#define FADT_FL_SEALED_CASE BIT(11) /**< 1=case is sealed */
--#define FADT_FL_HEADLESS BIT(12) /**< 1=system cannot detect moni/keyb/mouse */
--#define FADT_FL_CPU_SW_SLP BIT(13)
--#define FADT_FL_PCI_EXT_WAK BIT(14) /**< 1=system supports PCIEXP_WAKE_STS */
--#define FADT_FL_USE_PLATFORM_CLOCK BIT(15) /**< 1=system has ACPI PM timer */
--#define FADT_FL_S4_RTC_STS_VALID BIT(16) /**< 1=RTC_STS flag is valid when waking from S4 */
--#define FADT_FL_REMOVE_POWER_ON_CAPABLE BIT(17) /**< 1=platform can remote power on */
--#define FADT_FL_FORCE_APIC_CLUSTER_MODEL BIT(18)
--#define FADT_FL_FORCE_APIC_PHYS_DEST_MODE BIT(19)
-+#define FADT_FL_WBINVD RT_BIT(0) /**< emulation of WBINVD available */
-+#define FADT_FL_WBINVD_FLUSH RT_BIT(1)
-+#define FADT_FL_PROC_C1 RT_BIT(2) /**< 1=C1 supported on all processors */
-+#define FADT_FL_P_LVL2_UP RT_BIT(3) /**< 1=C2 works on SMP and UNI systems */
-+#define FADT_FL_PWR_BUTTON RT_BIT(4) /**< 1=power button handled as ctrl method dev */
-+#define FADT_FL_SLP_BUTTON RT_BIT(5) /**< 1=sleep button handled as ctrl method dev */
-+#define FADT_FL_FIX_RTC RT_BIT(6) /**< 0=RTC wake status in fixed register */
-+#define FADT_FL_RTC_S4 RT_BIT(7) /**< 1=RTC can wake system from S4 */
-+#define FADT_FL_TMR_VAL_EXT RT_BIT(8) /**< 1=TMR_VAL implemented as 32 bit */
-+#define FADT_FL_DCK_CAP RT_BIT(9) /**< 0=system cannot support docking */
-+#define FADT_FL_RESET_REG_SUP RT_BIT(10) /**< 1=system supports system resets */
-+#define FADT_FL_SEALED_CASE RT_BIT(11) /**< 1=case is sealed */
-+#define FADT_FL_HEADLESS RT_BIT(12) /**< 1=system cannot detect moni/keyb/mouse */
-+#define FADT_FL_CPU_SW_SLP RT_BIT(13)
-+#define FADT_FL_PCI_EXT_WAK RT_BIT(14) /**< 1=system supports PCIEXP_WAKE_STS */
-+#define FADT_FL_USE_PLATFORM_CLOCK RT_BIT(15) /**< 1=system has ACPI PM timer */
-+#define FADT_FL_S4_RTC_STS_VALID RT_BIT(16) /**< 1=RTC_STS flag is valid when waking from S4 */
-+#define FADT_FL_REMOVE_POWER_ON_CAPABLE RT_BIT(17) /**< 1=platform can remote power on */
-+#define FADT_FL_FORCE_APIC_CLUSTER_MODEL RT_BIT(18)
-+#define FADT_FL_FORCE_APIC_PHYS_DEST_MODE RT_BIT(19)
- ACPIGENADDR ResetReg; /**< ext addr of reset register */
- uint8_t u8ResetVal; /**< ResetReg value to reset the system */
- #define ACPI_RESET_REG_VAL 0x10
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/PC/DevPcBios.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/PC/DevPcBios.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/PC/DevPcBios.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/PC/DevPcBios.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -452,9 +452,9 @@ static DECLCALLBACK(int) pcbiosInitCompl
- case 2: u32 = 0x41; break; /* floppy installed, 2 drives. */
- default:u32 = 0; break; /* floppy not installed. */
- }
-- u32 |= BIT(1); /* math coprocessor installed */
-- u32 |= BIT(2); /* keyboard enabled (or mouse?) */
-- u32 |= BIT(3); /* display enabled (monitory type is 0, i.e. vga) */
-+ u32 |= RT_BIT(1); /* math coprocessor installed */
-+ u32 |= RT_BIT(2); /* keyboard enabled (or mouse?) */
-+ u32 |= RT_BIT(3); /* display enabled (monitory type is 0, i.e. vga) */
- pcbiosCmosWrite(pDevIns, 0x14, u32); /* 14h - Equipment Byte */
-
- /*
-@@ -759,15 +759,15 @@ static void pcbiosPlantDMITable(uint8_t
- pBIOSInf->u8Release = iStrNr++;
- STRCPY(pszStr, "12/01/2006");
- pBIOSInf->u8ROMSize = 1; /* 128K */
-- pBIOSInf->u64Characteristics = BIT(4) /* ISA is supported */
-- | BIT(7) /* PCI is supported */
-- | BIT(15) /* Boot from CD is supported */
-- | BIT(16) /* Selectable Boot is supported */
-- | BIT(27) /* Int 9h, 8042 Keyboard services supported */
-- | BIT(30) /* Int 10h, CGA/Mono Video Services supported */
-+ pBIOSInf->u64Characteristics = RT_BIT(4) /* ISA is supported */
-+ | RT_BIT(7) /* PCI is supported */
-+ | RT_BIT(15) /* Boot from CD is supported */
-+ | RT_BIT(16) /* Selectable Boot is supported */
-+ | RT_BIT(27) /* Int 9h, 8042 Keyboard services supported */
-+ | RT_BIT(30) /* Int 10h, CGA/Mono Video Services supported */
- /* any more?? */
- ;
-- pBIOSInf->u8CharacteristicsByte1 = BIT(0) /* ACPI is supported */
-+ pBIOSInf->u8CharacteristicsByte1 = RT_BIT(0) /* ACPI is supported */
- /* any more?? */
- ;
- pBIOSInf->u8CharacteristicsByte2 = 0
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Storage/VBoxHDD-new.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Storage/VBoxHDD-new.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Storage/VBoxHDD-new.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Storage/VBoxHDD-new.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -57,9 +57,9 @@ typedef struct VDIMAGE
- /**
- * uModified bit flags.
- */
--#define VD_IMAGE_MODIFIED_FLAG BIT(0)
--#define VD_IMAGE_MODIFIED_FIRST BIT(1)
--#define VD_IMAGE_MODIFIED_DISABLE_UUID_UPDATE BIT(2)
-+#define VD_IMAGE_MODIFIED_FLAG RT_BIT(0)
-+#define VD_IMAGE_MODIFIED_FIRST RT_BIT(1)
-+#define VD_IMAGE_MODIFIED_DISABLE_UUID_UPDATE RT_BIT(2)
-
-
- /**
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Storage/VDICore.h virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Storage/VDICore.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Storage/VDICore.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Storage/VDICore.h 2007-12-18 14:54:48.000000000 +0000
-@@ -421,9 +421,9 @@ DECLINLINE(PRTUUID) getImageParentModifi
- /**
- * fModified bit flags.
- */
--#define VDI_IMAGE_MODIFIED_FLAG BIT(0)
--#define VDI_IMAGE_MODIFIED_FIRST BIT(1)
--#define VDI_IMAGE_MODIFIED_DISABLE_UUID_UPDATE BIT(2)
-+#define VDI_IMAGE_MODIFIED_FLAG RT_BIT(0)
-+#define VDI_IMAGE_MODIFIED_FIRST RT_BIT(1)
-+#define VDI_IMAGE_MODIFIED_DISABLE_UUID_UPDATE RT_BIT(2)
-
- /**
- * Image structure
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Storage/fdc.c virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Storage/fdc.c
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Devices/Storage/fdc.c 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Devices/Storage/fdc.c 2007-12-18 14:54:48.000000000 +0000
-@@ -788,10 +788,10 @@ static uint32_t fdctrl_read_dor (fdctrl_
- #else
- /* bit4: 0 = drive 0 motor off/1 = on */
- if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
-- retval |= BIT(4);
-+ retval |= RT_BIT(4);
- /* bit5: 0 = drive 1 motor off/1 = on */
- if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
-- retval |= BIT(5);
-+ retval |= RT_BIT(5);
- #endif
- /* DMA enable */
- retval |= fdctrl->dma_en << 3;
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Frontends/VBoxManage/VBoxManage.h virtualbox-ose-1.5.2-dfsg2/src/VBox/Frontends/VBoxManage/VBoxManage.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Frontends/VBoxManage/VBoxManage.h 2007-08-30 15:16:23.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Frontends/VBoxManage/VBoxManage.h 2007-12-18 14:54:48.000000000 +0000
-@@ -21,46 +21,46 @@
-
- /** Syntax diagram category. */
- #define USAGE_DUMPOPTS 0
--#define USAGE_LIST BIT64(0)
--#define USAGE_SHOWVMINFO BIT64(1)
--#define USAGE_REGISTERVM BIT64(2)
--#define USAGE_UNREGISTERVM BIT64(3)
--#define USAGE_CREATEVM BIT64(4)
--#define USAGE_MODIFYVM BIT64(5)
--#define USAGE_STARTVM BIT64(6)
--#define USAGE_CONTROLVM BIT64(7)
--#define USAGE_DISCARDSTATE BIT64(8)
--#define USAGE_SNAPSHOT BIT64(9)
--#define USAGE_REGISTERIMAGE BIT64(10)
--#define USAGE_UNREGISTERIMAGE BIT64(11)
--#define USAGE_SHOWVDIINFO BIT64(12)
--#define USAGE_CREATEVDI BIT64(13)
--#define USAGE_MODIFYVDI BIT64(14)
--#define USAGE_CLONEVDI BIT64(15)
--#define USAGE_ADDISCSIDISK BIT64(16)
--#define USAGE_CREATEHOSTIF BIT64(17)
--#define USAGE_REMOVEHOSTIF BIT64(18)
--#define USAGE_GETEXTRADATA BIT64(19)
--#define USAGE_SETEXTRADATA BIT64(20)
--#define USAGE_SETPROPERTY BIT64(21)
--#define USAGE_USBFILTER (BIT64(22) | BIT64(23) | BIT64(24))
--#define USAGE_USBFILTER_ADD BIT64(22)
--#define USAGE_USBFILTER_MODIFY BIT64(23)
--#define USAGE_USBFILTER_REMOVE BIT64(24)
--#define USAGE_SHAREDFOLDER (BIT64(25) | BIT64(26))
--#define USAGE_SHAREDFOLDER_ADD BIT64(25)
--#define USAGE_SHAREDFOLDER_REMOVE BIT64(26)
--#define USAGE_UPDATESETTINGS BIT64(27)
--#define USAGE_LOADSYMS BIT64(29)
--#define USAGE_UNLOADSYMS BIT64(30)
--#define USAGE_SETVDIUUID BIT64(31)
--#define USAGE_CONVERTDD BIT64(32)
-+#define USAGE_LIST RT_BIT_64(0)
-+#define USAGE_SHOWVMINFO RT_BIT_64(1)
-+#define USAGE_REGISTERVM RT_BIT_64(2)
-+#define USAGE_UNREGISTERVM RT_BIT_64(3)
-+#define USAGE_CREATEVM RT_BIT_64(4)
-+#define USAGE_MODIFYVM RT_BIT_64(5)
-+#define USAGE_STARTVM RT_BIT_64(6)
-+#define USAGE_CONTROLVM RT_BIT_64(7)
-+#define USAGE_DISCARDSTATE RT_BIT_64(8)
-+#define USAGE_SNAPSHOT RT_BIT_64(9)
-+#define USAGE_REGISTERIMAGE RT_BIT_64(10)
-+#define USAGE_UNREGISTERIMAGE RT_BIT_64(11)
-+#define USAGE_SHOWVDIINFO RT_BIT_64(12)
-+#define USAGE_CREATEVDI RT_BIT_64(13)
-+#define USAGE_MODIFYVDI RT_BIT_64(14)
-+#define USAGE_CLONEVDI RT_BIT_64(15)
-+#define USAGE_ADDISCSIDISK RT_BIT_64(16)
-+#define USAGE_CREATEHOSTIF RT_BIT_64(17)
-+#define USAGE_REMOVEHOSTIF RT_BIT_64(18)
-+#define USAGE_GETEXTRADATA RT_BIT_64(19)
-+#define USAGE_SETEXTRADATA RT_BIT_64(20)
-+#define USAGE_SETPROPERTY RT_BIT_64(21)
-+#define USAGE_USBFILTER (RT_BIT_64(22) | RT_BIT_64(23) | RT_BIT_64(24))
-+#define USAGE_USBFILTER_ADD RT_BIT_64(22)
-+#define USAGE_USBFILTER_MODIFY RT_BIT_64(23)
-+#define USAGE_USBFILTER_REMOVE RT_BIT_64(24)
-+#define USAGE_SHAREDFOLDER (RT_BIT_64(25) | RT_BIT_64(26))
-+#define USAGE_SHAREDFOLDER_ADD RT_BIT_64(25)
-+#define USAGE_SHAREDFOLDER_REMOVE RT_BIT_64(26)
-+#define USAGE_UPDATESETTINGS RT_BIT_64(27)
-+#define USAGE_LOADSYMS RT_BIT_64(29)
-+#define USAGE_UNLOADSYMS RT_BIT_64(30)
-+#define USAGE_SETVDIUUID RT_BIT_64(31)
-+#define USAGE_CONVERTDD RT_BIT_64(32)
- #ifdef VBOX_OSE
- #define USAGE_LISTPARTITIONS (0)
- #define USAGE_CREATERAWVMDK (0)
- #else /* !VBOX_OSE */
--#define USAGE_LISTPARTITIONS BIT64(33)
--#define USAGE_CREATERAWVMDK BIT64(34)
-+#define USAGE_LISTPARTITIONS RT_BIT_64(33)
-+#define USAGE_CREATERAWVMDK RT_BIT_64(34)
- #endif /* !VBOX_OSE */
- #define USAGE_ALL (~(uint64_t)0)
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/HostDrivers/Support/SUPDRVShared.c virtualbox-ose-1.5.2-dfsg2/src/VBox/HostDrivers/Support/SUPDRVShared.c
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/HostDrivers/Support/SUPDRVShared.c 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/HostDrivers/Support/SUPDRVShared.c 2007-12-18 14:54:48.000000000 +0000
-@@ -65,23 +65,23 @@ typedef enum VMMR0OPERATION
- *******************************************************************************/
- /* from x86.h - clashes with linux thus this duplication */
- #undef X86_CR0_PG
--#define X86_CR0_PG BIT(31)
-+#define X86_CR0_PG RT_BIT(31)
- #undef X86_CR0_PE
--#define X86_CR0_PE BIT(0)
-+#define X86_CR0_PE RT_BIT(0)
- #undef X86_CPUID_AMD_FEATURE_EDX_NX
--#define X86_CPUID_AMD_FEATURE_EDX_NX BIT(20)
-+#define X86_CPUID_AMD_FEATURE_EDX_NX RT_BIT(20)
- #undef MSR_K6_EFER
- #define MSR_K6_EFER 0xc0000080
- #undef MSR_K6_EFER_NXE
--#define MSR_K6_EFER_NXE BIT(11)
-+#define MSR_K6_EFER_NXE RT_BIT(11)
- #undef MSR_K6_EFER_LMA
--#define MSR_K6_EFER_LMA BIT(10)
-+#define MSR_K6_EFER_LMA RT_BIT(10)
- #undef X86_CR4_PGE
--#define X86_CR4_PGE BIT(7)
-+#define X86_CR4_PGE RT_BIT(7)
- #undef X86_CR4_PAE
--#define X86_CR4_PAE BIT(5)
-+#define X86_CR4_PAE RT_BIT(5)
- #undef X86_CPUID_AMD_FEATURE_EDX_LONG_MODE
--#define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE BIT(29)
-+#define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE RT_BIT(29)
-
-
- /** The frequency by which we recalculate the u32UpdateHz and
-@@ -4127,9 +4127,9 @@ static int supdrvIOCtl_GetPagingMode(PSU
- {
- uint64_t efer = ASMRdMsr(MSR_K6_EFER);
- if ((fAmdFeatures & X86_CPUID_AMD_FEATURE_EDX_NX) && (efer & MSR_K6_EFER_NXE))
-- fNXEPlusLMA |= BIT(0);
-+ fNXEPlusLMA |= RT_BIT(0);
- if ((fAmdFeatures & X86_CPUID_AMD_FEATURE_EDX_LONG_MODE) && (efer & MSR_K6_EFER_LMA))
-- fNXEPlusLMA |= BIT(1);
-+ fNXEPlusLMA |= RT_BIT(1);
- }
- }
-
-@@ -4147,7 +4147,7 @@ static int supdrvIOCtl_GetPagingMode(PSU
- pOut->enmMode = SUPPAGINGMODE_PAE;
- break;
-
-- case X86_CR4_PAE | BIT(0):
-+ case X86_CR4_PAE | RT_BIT(0):
- pOut->enmMode = SUPPAGINGMODE_PAE_NX;
- break;
-
-@@ -4155,23 +4155,23 @@ static int supdrvIOCtl_GetPagingMode(PSU
- pOut->enmMode = SUPPAGINGMODE_PAE_GLOBAL;
- break;
-
-- case X86_CR4_PAE | X86_CR4_PGE | BIT(0):
-+ case X86_CR4_PAE | X86_CR4_PGE | RT_BIT(0):
- pOut->enmMode = SUPPAGINGMODE_PAE_GLOBAL;
- break;
-
-- case BIT(1) | X86_CR4_PAE:
-+ case RT_BIT(1) | X86_CR4_PAE:
- pOut->enmMode = SUPPAGINGMODE_AMD64;
- break;
-
-- case BIT(1) | X86_CR4_PAE | BIT(0):
-+ case RT_BIT(1) | X86_CR4_PAE | RT_BIT(0):
- pOut->enmMode = SUPPAGINGMODE_AMD64_NX;
- break;
-
-- case BIT(1) | X86_CR4_PAE | X86_CR4_PGE:
-+ case RT_BIT(1) | X86_CR4_PAE | X86_CR4_PGE:
- pOut->enmMode = SUPPAGINGMODE_AMD64_GLOBAL;
- break;
-
-- case BIT(1) | X86_CR4_PAE | X86_CR4_PGE | BIT(0):
-+ case RT_BIT(1) | X86_CR4_PAE | X86_CR4_PGE | RT_BIT(0):
- pOut->enmMode = SUPPAGINGMODE_AMD64_GLOBAL_NX;
- break;
-
-@@ -4518,7 +4518,7 @@ static SUPGIPMODE supdrvGipDeterminTscMo
- if (uEAX >= 0x80000007)
- {
- ASMCpuId(0x80000007, &uEAX, &uEBX, &uECX, &uEDX);
-- if ( !(uEDX & BIT(8))/* TscInvariant */
-+ if ( !(uEDX & RT_BIT(8))/* TscInvariant */
- && (uEDX & 0x3e)) /* STC|TM|THERMTRIP|VID|FID. Ignore TS. */
- return SUPGIPMODE_ASYNC_TSC;
- }
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/alloc/heapsimple.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/alloc/heapsimple.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/alloc/heapsimple.cpp 2007-08-30 15:16:25.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/alloc/heapsimple.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -60,11 +60,11 @@ typedef struct RTHEAPSIMPLEBLOCK
- AssertCompileSizeAlignment(RTHEAPSIMPLEBLOCK, 16);
-
- /** The block is free if this flag is set. When cleared it's allocated. */
--#define RTHEAPSIMPLEBLOCK_FLAGS_FREE ((uintptr_t)BIT(0))
-+#define RTHEAPSIMPLEBLOCK_FLAGS_FREE ((uintptr_t)RT_BIT(0))
- /** The magic value. */
- #define RTHEAPSIMPLEBLOCK_FLAGS_MAGIC ((uintptr_t)0xabcdef00)
- /** The mask that needs to be applied to RTHEAPSIMPLEBLOCK::fFalgs to obtain the magic value. */
--#define RTHEAPSIMPLEBLOCK_FLAGS_MAGIC_MASK (~(uintptr_t)BIT(0))
-+#define RTHEAPSIMPLEBLOCK_FLAGS_MAGIC_MASK (~(uintptr_t)RT_BIT(0))
-
- /**
- * Checks if the specified block is valid or not.
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/include/internal/thread.h virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/include/internal/thread.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/include/internal/thread.h 2007-08-30 15:16:24.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/include/internal/thread.h 2007-12-18 14:54:48.000000000 +0000
-@@ -132,14 +132,14 @@ typedef struct RTTHREADINT
- * @{ */
- /** Set if the thread is an alien thread.
- * Clear if the thread was created by IPRT. */
--#define RTTHREADINT_FLAGS_ALIEN BIT(0)
-+#define RTTHREADINT_FLAGS_ALIEN RT_BIT(0)
- /** Set if the thread has terminated.
- * Clear if the thread is running. */
--#define RTTHREADINT_FLAGS_TERMINATED BIT(1)
-+#define RTTHREADINT_FLAGS_TERMINATED RT_BIT(1)
- /** This bit is set if the thread is in the AVL tree. */
- #define RTTHREADINT_FLAG_IN_TREE_BIT 2
- /** @copydoc RTTHREADINT_FLAG_IN_TREE_BIT */
--#define RTTHREADINT_FLAG_IN_TREE BIT(RTTHREADINT_FLAG_IN_TREE_BIT)
-+#define RTTHREADINT_FLAG_IN_TREE RT_BIT(RTTHREADINT_FLAG_IN_TREE_BIT)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/r0drv/alloc-r0drv.h virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/r0drv/alloc-r0drv.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/r0drv/alloc-r0drv.h 2007-08-30 15:16:24.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/r0drv/alloc-r0drv.h 2007-12-18 14:54:48.000000000 +0000
-@@ -42,11 +42,11 @@ typedef struct RTMEMHDR
-
- /** @name RTMEMHDR::fFlags.
- * @{ */
--#define RTMEMHDR_FLAG_ZEROED BIT(0)
--#define RTMEMHDR_FLAG_EXEC BIT(1)
-+#define RTMEMHDR_FLAG_ZEROED RT_BIT(0)
-+#define RTMEMHDR_FLAG_EXEC RT_BIT(1)
- #ifdef RT_OS_LINUX
--#define RTMEMHDR_FLAG_EXEC_HEAP BIT(30)
--#define RTMEMHDR_FLAG_KMALLOC BIT(31)
-+#define RTMEMHDR_FLAG_EXEC_HEAP RT_BIT(30)
-+#define RTMEMHDR_FLAG_KMALLOC RT_BIT(31)
- #endif
- /** @} */
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/strformatrt.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/strformatrt.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/strformatrt.cpp 2007-08-30 15:16:25.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/strformatrt.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -644,7 +644,7 @@ size_t rtstrFormatRt(PFNRTSTROUTPUT pfnO
- RTST_TIMESPEC
- } RTST;
- /** Set if it's a pointer */
--#define RTST_FLAGS_POINTER BIT(0)
-+#define RTST_FLAGS_POINTER RT_BIT(0)
- static const struct
- {
- uint8_t cch; /**< the length of the string. */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/testcase/tstBitOperations.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/testcase/tstBitOperations.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/testcase/tstBitOperations.cpp 2007-08-30 15:16:24.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/testcase/tstBitOperations.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -263,7 +263,7 @@ int main()
- CHECK(ASMBitLastSetU32(1) == 1);
- CHECK(ASMBitLastSetU32(0x80000000) == 32);
- CHECK(ASMBitLastSetU32(0xffffffff) == 32);
-- CHECK(ASMBitLastSetU32(BIT(23) | BIT(11)) == 24);
-+ CHECK(ASMBitLastSetU32(RT_BIT(23) | RT_BIT(11)) == 24);
- for (i = 0; i < 32; i++)
- CHECK(ASMBitLastSetU32(1 << i) == (unsigned)i + 1);
-
-@@ -271,7 +271,7 @@ int main()
- CHECK(ASMBitFirstSetU32(1) == 1);
- CHECK(ASMBitFirstSetU32(0x80000000) == 32);
- CHECK(ASMBitFirstSetU32(0xffffffff) == 1);
-- CHECK(ASMBitFirstSetU32(BIT(23) | BIT(11)) == 12);
-+ CHECK(ASMBitFirstSetU32(RT_BIT(23) | RT_BIT(11)) == 12);
- for (i = 0; i < 32; i++)
- CHECK(ASMBitFirstSetU32(1 << i) == (unsigned)i + 1);
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/testcase/tstInlineAsm.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/testcase/tstInlineAsm.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/testcase/tstInlineAsm.cpp 2007-08-30 15:16:24.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/testcase/tstInlineAsm.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -184,49 +184,49 @@ void tstASMCpuId(void)
- (s.uEBX >> 0) & 0xff);
-
- RTPrintf("Features EDX: ");
-- if (s.uEDX & BIT(0)) RTPrintf(" FPU");
-- if (s.uEDX & BIT(1)) RTPrintf(" VME");
-- if (s.uEDX & BIT(2)) RTPrintf(" DE");
-- if (s.uEDX & BIT(3)) RTPrintf(" PSE");
-- if (s.uEDX & BIT(4)) RTPrintf(" TSC");
-- if (s.uEDX & BIT(5)) RTPrintf(" MSR");
-- if (s.uEDX & BIT(6)) RTPrintf(" PAE");
-- if (s.uEDX & BIT(7)) RTPrintf(" MCE");
-- if (s.uEDX & BIT(8)) RTPrintf(" CX8");
-- if (s.uEDX & BIT(9)) RTPrintf(" APIC");
-- if (s.uEDX & BIT(10)) RTPrintf(" 10");
-- if (s.uEDX & BIT(11)) RTPrintf(" SEP");
-- if (s.uEDX & BIT(12)) RTPrintf(" MTRR");
-- if (s.uEDX & BIT(13)) RTPrintf(" PGE");
-- if (s.uEDX & BIT(14)) RTPrintf(" MCA");
-- if (s.uEDX & BIT(15)) RTPrintf(" CMOV");
-- if (s.uEDX & BIT(16)) RTPrintf(" PAT");
-- if (s.uEDX & BIT(17)) RTPrintf(" PSE36");
-- if (s.uEDX & BIT(18)) RTPrintf(" PSN");
-- if (s.uEDX & BIT(19)) RTPrintf(" CLFSH");
-- if (s.uEDX & BIT(20)) RTPrintf(" 20");
-- if (s.uEDX & BIT(21)) RTPrintf(" DS");
-- if (s.uEDX & BIT(22)) RTPrintf(" ACPI");
-- if (s.uEDX & BIT(23)) RTPrintf(" MMX");
-- if (s.uEDX & BIT(24)) RTPrintf(" FXSR");
-- if (s.uEDX & BIT(25)) RTPrintf(" SSE");
-- if (s.uEDX & BIT(26)) RTPrintf(" SSE2");
-- if (s.uEDX & BIT(27)) RTPrintf(" SS");
-- if (s.uEDX & BIT(28)) RTPrintf(" HTT");
-- if (s.uEDX & BIT(29)) RTPrintf(" 29");
-- if (s.uEDX & BIT(30)) RTPrintf(" 30");
-- if (s.uEDX & BIT(31)) RTPrintf(" 31");
-+ if (s.uEDX & RT_BIT(0)) RTPrintf(" FPU");
-+ if (s.uEDX & RT_BIT(1)) RTPrintf(" VME");
-+ if (s.uEDX & RT_BIT(2)) RTPrintf(" DE");
-+ if (s.uEDX & RT_BIT(3)) RTPrintf(" PSE");
-+ if (s.uEDX & RT_BIT(4)) RTPrintf(" TSC");
-+ if (s.uEDX & RT_BIT(5)) RTPrintf(" MSR");
-+ if (s.uEDX & RT_BIT(6)) RTPrintf(" PAE");
-+ if (s.uEDX & RT_BIT(7)) RTPrintf(" MCE");
-+ if (s.uEDX & RT_BIT(8)) RTPrintf(" CX8");
-+ if (s.uEDX & RT_BIT(9)) RTPrintf(" APIC");
-+ if (s.uEDX & RT_BIT(10)) RTPrintf(" 10");
-+ if (s.uEDX & RT_BIT(11)) RTPrintf(" SEP");
-+ if (s.uEDX & RT_BIT(12)) RTPrintf(" MTRR");
-+ if (s.uEDX & RT_BIT(13)) RTPrintf(" PGE");
-+ if (s.uEDX & RT_BIT(14)) RTPrintf(" MCA");
-+ if (s.uEDX & RT_BIT(15)) RTPrintf(" CMOV");
-+ if (s.uEDX & RT_BIT(16)) RTPrintf(" PAT");
-+ if (s.uEDX & RT_BIT(17)) RTPrintf(" PSE36");
-+ if (s.uEDX & RT_BIT(18)) RTPrintf(" PSN");
-+ if (s.uEDX & RT_BIT(19)) RTPrintf(" CLFSH");
-+ if (s.uEDX & RT_BIT(20)) RTPrintf(" 20");
-+ if (s.uEDX & RT_BIT(21)) RTPrintf(" DS");
-+ if (s.uEDX & RT_BIT(22)) RTPrintf(" ACPI");
-+ if (s.uEDX & RT_BIT(23)) RTPrintf(" MMX");
-+ if (s.uEDX & RT_BIT(24)) RTPrintf(" FXSR");
-+ if (s.uEDX & RT_BIT(25)) RTPrintf(" SSE");
-+ if (s.uEDX & RT_BIT(26)) RTPrintf(" SSE2");
-+ if (s.uEDX & RT_BIT(27)) RTPrintf(" SS");
-+ if (s.uEDX & RT_BIT(28)) RTPrintf(" HTT");
-+ if (s.uEDX & RT_BIT(29)) RTPrintf(" 29");
-+ if (s.uEDX & RT_BIT(30)) RTPrintf(" 30");
-+ if (s.uEDX & RT_BIT(31)) RTPrintf(" 31");
- RTPrintf("\n");
-
- /** @todo check intel docs. */
- RTPrintf("Features ECX: ");
-- if (s.uECX & BIT(0)) RTPrintf(" SSE3");
-+ if (s.uECX & RT_BIT(0)) RTPrintf(" SSE3");
- for (iBit = 1; iBit < 13; iBit++)
-- if (s.uECX & BIT(iBit))
-+ if (s.uECX & RT_BIT(iBit))
- RTPrintf(" %d", iBit);
-- if (s.uECX & BIT(13)) RTPrintf(" CX16");
-+ if (s.uECX & RT_BIT(13)) RTPrintf(" CX16");
- for (iBit = 14; iBit < 32; iBit++)
-- if (s.uECX & BIT(iBit))
-+ if (s.uECX & RT_BIT(iBit))
- RTPrintf(" %d", iBit);
- RTPrintf("\n");
- }
-@@ -276,48 +276,48 @@ void tstASMCpuId(void)
- s.uEBX & 0xfff);
-
- RTPrintf("Features EDX: ");
-- if (s.uEDX & BIT(0)) RTPrintf(" FPU");
-- if (s.uEDX & BIT(1)) RTPrintf(" VME");
-- if (s.uEDX & BIT(2)) RTPrintf(" DE");
-- if (s.uEDX & BIT(3)) RTPrintf(" PSE");
-- if (s.uEDX & BIT(4)) RTPrintf(" TSC");
-- if (s.uEDX & BIT(5)) RTPrintf(" MSR");
-- if (s.uEDX & BIT(6)) RTPrintf(" PAE");
-- if (s.uEDX & BIT(7)) RTPrintf(" MCE");
-- if (s.uEDX & BIT(8)) RTPrintf(" CMPXCHG8B");
-- if (s.uEDX & BIT(9)) RTPrintf(" APIC");
-- if (s.uEDX & BIT(10)) RTPrintf(" 10");
-- if (s.uEDX & BIT(11)) RTPrintf(" SysCallSysRet");
-- if (s.uEDX & BIT(12)) RTPrintf(" MTRR");
-- if (s.uEDX & BIT(13)) RTPrintf(" PGE");
-- if (s.uEDX & BIT(14)) RTPrintf(" MCA");
-- if (s.uEDX & BIT(15)) RTPrintf(" CMOV");
-- if (s.uEDX & BIT(16)) RTPrintf(" PAT");
-- if (s.uEDX & BIT(17)) RTPrintf(" PSE36");
-- if (s.uEDX & BIT(18)) RTPrintf(" 18");
-- if (s.uEDX & BIT(19)) RTPrintf(" 19");
-- if (s.uEDX & BIT(20)) RTPrintf(" NX");
-- if (s.uEDX & BIT(21)) RTPrintf(" 21");
-- if (s.uEDX & BIT(22)) RTPrintf(" MmxExt");
-- if (s.uEDX & BIT(23)) RTPrintf(" MMX");
-- if (s.uEDX & BIT(24)) RTPrintf(" FXSR");
-- if (s.uEDX & BIT(25)) RTPrintf(" FastFXSR");
-- if (s.uEDX & BIT(26)) RTPrintf(" 26");
-- if (s.uEDX & BIT(27)) RTPrintf(" RDTSCP");
-- if (s.uEDX & BIT(28)) RTPrintf(" 28");
-- if (s.uEDX & BIT(29)) RTPrintf(" LongMode");
-- if (s.uEDX & BIT(30)) RTPrintf(" 3DNowExt");
-- if (s.uEDX & BIT(31)) RTPrintf(" 3DNow");
-+ if (s.uEDX & RT_BIT(0)) RTPrintf(" FPU");
-+ if (s.uEDX & RT_BIT(1)) RTPrintf(" VME");
-+ if (s.uEDX & RT_BIT(2)) RTPrintf(" DE");
-+ if (s.uEDX & RT_BIT(3)) RTPrintf(" PSE");
-+ if (s.uEDX & RT_BIT(4)) RTPrintf(" TSC");
-+ if (s.uEDX & RT_BIT(5)) RTPrintf(" MSR");
-+ if (s.uEDX & RT_BIT(6)) RTPrintf(" PAE");
-+ if (s.uEDX & RT_BIT(7)) RTPrintf(" MCE");
-+ if (s.uEDX & RT_BIT(8)) RTPrintf(" CMPXCHG8B");
-+ if (s.uEDX & RT_BIT(9)) RTPrintf(" APIC");
-+ if (s.uEDX & RT_BIT(10)) RTPrintf(" 10");
-+ if (s.uEDX & RT_BIT(11)) RTPrintf(" SysCallSysRet");
-+ if (s.uEDX & RT_BIT(12)) RTPrintf(" MTRR");
-+ if (s.uEDX & RT_BIT(13)) RTPrintf(" PGE");
-+ if (s.uEDX & RT_BIT(14)) RTPrintf(" MCA");
-+ if (s.uEDX & RT_BIT(15)) RTPrintf(" CMOV");
-+ if (s.uEDX & RT_BIT(16)) RTPrintf(" PAT");
-+ if (s.uEDX & RT_BIT(17)) RTPrintf(" PSE36");
-+ if (s.uEDX & RT_BIT(18)) RTPrintf(" 18");
-+ if (s.uEDX & RT_BIT(19)) RTPrintf(" 19");
-+ if (s.uEDX & RT_BIT(20)) RTPrintf(" NX");
-+ if (s.uEDX & RT_BIT(21)) RTPrintf(" 21");
-+ if (s.uEDX & RT_BIT(22)) RTPrintf(" MmxExt");
-+ if (s.uEDX & RT_BIT(23)) RTPrintf(" MMX");
-+ if (s.uEDX & RT_BIT(24)) RTPrintf(" FXSR");
-+ if (s.uEDX & RT_BIT(25)) RTPrintf(" FastFXSR");
-+ if (s.uEDX & RT_BIT(26)) RTPrintf(" 26");
-+ if (s.uEDX & RT_BIT(27)) RTPrintf(" RDTSCP");
-+ if (s.uEDX & RT_BIT(28)) RTPrintf(" 28");
-+ if (s.uEDX & RT_BIT(29)) RTPrintf(" LongMode");
-+ if (s.uEDX & RT_BIT(30)) RTPrintf(" 3DNowExt");
-+ if (s.uEDX & RT_BIT(31)) RTPrintf(" 3DNow");
- RTPrintf("\n");
-
- RTPrintf("Features ECX: ");
-- if (s.uECX & BIT(0)) RTPrintf(" LahfSahf");
-- if (s.uECX & BIT(1)) RTPrintf(" CmpLegacy");
-- if (s.uECX & BIT(2)) RTPrintf(" SVM");
-- if (s.uECX & BIT(3)) RTPrintf(" 3");
-- if (s.uECX & BIT(4)) RTPrintf(" AltMovCr8");
-+ if (s.uECX & RT_BIT(0)) RTPrintf(" LahfSahf");
-+ if (s.uECX & RT_BIT(1)) RTPrintf(" CmpLegacy");
-+ if (s.uECX & RT_BIT(2)) RTPrintf(" SVM");
-+ if (s.uECX & RT_BIT(3)) RTPrintf(" 3");
-+ if (s.uECX & RT_BIT(4)) RTPrintf(" AltMovCr8");
- for (iBit = 5; iBit < 32; iBit++)
-- if (s.uECX & BIT(iBit))
-+ if (s.uECX & RT_BIT(iBit))
- RTPrintf(" %d", iBit);
- RTPrintf("\n");
- }
-@@ -386,17 +386,17 @@ void tstASMCpuId(void)
- {
- ASMCpuId(0x80000007, &s.uEAX, &s.uEBX, &s.uECX, &s.uEDX);
- RTPrintf("APM Features: ");
-- if (s.uEDX & BIT(0)) RTPrintf(" TS");
-- if (s.uEDX & BIT(1)) RTPrintf(" FID");
-- if (s.uEDX & BIT(2)) RTPrintf(" VID");
-- if (s.uEDX & BIT(3)) RTPrintf(" TTP");
-- if (s.uEDX & BIT(4)) RTPrintf(" TM");
-- if (s.uEDX & BIT(5)) RTPrintf(" STC");
-- if (s.uEDX & BIT(6)) RTPrintf(" 6");
-- if (s.uEDX & BIT(7)) RTPrintf(" 7");
-- if (s.uEDX & BIT(8)) RTPrintf(" TscInvariant");
-+ if (s.uEDX & RT_BIT(0)) RTPrintf(" TS");
-+ if (s.uEDX & RT_BIT(1)) RTPrintf(" FID");
-+ if (s.uEDX & RT_BIT(2)) RTPrintf(" VID");
-+ if (s.uEDX & RT_BIT(3)) RTPrintf(" TTP");
-+ if (s.uEDX & RT_BIT(4)) RTPrintf(" TM");
-+ if (s.uEDX & RT_BIT(5)) RTPrintf(" STC");
-+ if (s.uEDX & RT_BIT(6)) RTPrintf(" 6");
-+ if (s.uEDX & RT_BIT(7)) RTPrintf(" 7");
-+ if (s.uEDX & RT_BIT(8)) RTPrintf(" TscInvariant");
- for (iBit = 9; iBit < 32; iBit++)
-- if (s.uEDX & BIT(iBit))
-+ if (s.uEDX & RT_BIT(iBit))
- RTPrintf(" %d", iBit);
- RTPrintf("\n");
- }
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/utf-8.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/utf-8.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/Runtime/utf-8.cpp 2007-08-30 15:16:25.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Runtime/utf-8.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -47,19 +47,19 @@ static int rtUtf8Length(const char *psz,
- const unsigned char uch = *puch;
- if (!uch)
- break;
-- if (uch & BIT(7))
-+ if (uch & RT_BIT(7))
- {
- /* figure sequence length and validate the first byte */
- unsigned cb;
-- if ((uch & (BIT(7) | BIT(6) | BIT(5))) == (BIT(7) | BIT(6)))
-+ if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5))) == (RT_BIT(7) | RT_BIT(6)))
- cb = 2;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4))) == (BIT(7) | BIT(6) | BIT(5)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5)))
- cb = 3;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4)))
- cb = 4;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3) | RT_BIT(2))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3)))
- cb = 5;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3) | RT_BIT(2) | RT_BIT(1))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3) | RT_BIT(2)))
- cb = 6;
- else
- {
-@@ -78,15 +78,15 @@ static int rtUtf8Length(const char *psz,
- switch (cb)
- {
- case 6:
-- RTStrAssertMsgReturn((puch[5] & (BIT(7) | BIT(6))) == BIT(7), ("6/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[5] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("6/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 5:
-- RTStrAssertMsgReturn((puch[4] & (BIT(7) | BIT(6))) == BIT(7), ("5/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[4] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("5/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 4:
-- RTStrAssertMsgReturn((puch[3] & (BIT(7) | BIT(6))) == BIT(7), ("4/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[3] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("4/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 3:
-- RTStrAssertMsgReturn((puch[2] & (BIT(7) | BIT(6))) == BIT(7), ("3/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[2] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("3/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 2:
-- RTStrAssertMsgReturn((puch[1] & (BIT(7) | BIT(6))) == BIT(7), ("2/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[1] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("2/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- break;
- }
-
-@@ -193,24 +193,24 @@ static int rtUtf8Decode(const char *psz,
- }
-
- /* decode and recode the code point */
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- {
- *pCp++ = uch;
- puch++;
- cch--;
- }
- #ifdef RT_STRICT
-- else if (!(uch & BIT(6)))
-+ else if (!(uch & RT_BIT(6)))
- AssertMsgFailed(("Internal error!\n"));
- #endif
-- else if (!(uch & BIT(5)))
-+ else if (!(uch & RT_BIT(5)))
- {
- *pCp++ = (puch[1] & 0x3f)
- | ((uint16_t)(uch & 0x1f) << 6);
- puch += 2;
- cch -= 2;
- }
-- else if (!(uch & BIT(4)))
-+ else if (!(uch & RT_BIT(4)))
- {
- *pCp++ = (puch[2] & 0x3f)
- | ((uint16_t)(puch[1] & 0x3f) << 6)
-@@ -218,7 +218,7 @@ static int rtUtf8Decode(const char *psz,
- puch += 3;
- cch -= 3;
- }
-- else if (!(uch & BIT(3)))
-+ else if (!(uch & RT_BIT(3)))
- {
- *pCp++ = (puch[3] & 0x3f)
- | ((RTUNICP)(puch[2] & 0x3f) << 6)
-@@ -227,7 +227,7 @@ static int rtUtf8Decode(const char *psz,
- puch += 4;
- cch -= 4;
- }
-- else if (!(uch & BIT(2)))
-+ else if (!(uch & RT_BIT(2)))
- {
- *pCp++ = (puch[4] & 0x3f)
- | ((RTUNICP)(puch[3] & 0x3f) << 6)
-@@ -239,7 +239,7 @@ static int rtUtf8Decode(const char *psz,
- }
- else
- {
-- Assert(!(uch & BIT(1)));
-+ Assert(!(uch & RT_BIT(1)));
- *pCp++ = (puch[5] & 0x3f)
- | ((RTUNICP)(puch[4] & 0x3f) << 6)
- | ((RTUNICP)(puch[3] & 0x3f) << 12)
-@@ -393,7 +393,7 @@ static int rtUtf8CalcUtf16Length(const c
- const unsigned char uch = *puch;
- if (!uch)
- break;
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- {
- /* one ASCII byte */
- cwc++;
-@@ -404,15 +404,15 @@ static int rtUtf8CalcUtf16Length(const c
- {
- /* figure sequence length and validate the first byte */
- unsigned cb;
-- if ((uch & (BIT(7) | BIT(6) | BIT(5))) == (BIT(7) | BIT(6)))
-+ if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5))) == (RT_BIT(7) | RT_BIT(6)))
- cb = 2;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4))) == (BIT(7) | BIT(6) | BIT(5)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5)))
- cb = 3;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4)))
- cb = 4;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3) | RT_BIT(2))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3)))
- cb = 5;
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3) | RT_BIT(2) | RT_BIT(1))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3) | RT_BIT(2)))
- cb = 6;
- else
- {
-@@ -431,15 +431,15 @@ static int rtUtf8CalcUtf16Length(const c
- switch (cb)
- {
- case 6:
-- RTStrAssertMsgReturn((puch[5] & (BIT(7) | BIT(6))) == BIT(7), ("6/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[5] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("6/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 5:
-- RTStrAssertMsgReturn((puch[4] & (BIT(7) | BIT(6))) == BIT(7), ("5/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[4] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("5/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 4:
-- RTStrAssertMsgReturn((puch[3] & (BIT(7) | BIT(6))) == BIT(7), ("4/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[3] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("4/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 3:
-- RTStrAssertMsgReturn((puch[2] & (BIT(7) | BIT(6))) == BIT(7), ("3/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[2] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("3/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- case 2:
-- RTStrAssertMsgReturn((puch[1] & (BIT(7) | BIT(6))) == BIT(7), ("2/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
-+ RTStrAssertMsgReturn((puch[1] & (RT_BIT(7) | RT_BIT(6))) == RT_BIT(7), ("2/%u: %.*Rhxs\n", cb, RT_MIN(cb + 10, cch), puch), VERR_INVALID_UTF8_ENCODING);
- break;
- }
-
-@@ -545,13 +545,13 @@ static int rtUtf8RecodeAsUtf16(const cha
- }
-
- /* decode and recode the code point */
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- {
- *pwc++ = uch;
- puch++;
- cch--;
- }
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5))) == (BIT(7) | BIT(6)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5))) == (RT_BIT(7) | RT_BIT(6)))
- {
- uint16_t uc = (puch[1] & 0x3f)
- | ((uint16_t)(uch & 0x1f) << 6);
-@@ -559,7 +559,7 @@ static int rtUtf8RecodeAsUtf16(const cha
- puch += 2;
- cch -= 2;
- }
-- else if ((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4))) == (BIT(7) | BIT(6) | BIT(5)))
-+ else if ((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5)))
- {
- uint16_t uc = (puch[2] & 0x3f)
- | ((uint16_t)(puch[1] & 0x3f) << 6)
-@@ -571,7 +571,7 @@ static int rtUtf8RecodeAsUtf16(const cha
- else
- {
- /* generate surrugate pair */
-- Assert((uch & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3))) == (BIT(7) | BIT(6) | BIT(5) | BIT(4)));
-+ Assert((uch & (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4) | RT_BIT(3))) == (RT_BIT(7) | RT_BIT(6) | RT_BIT(5) | RT_BIT(4)));
- RTUNICP uc = (puch[3] & 0x3f)
- | ((RTUNICP)(puch[2] & 0x3f) << 6)
- | ((RTUNICP)(puch[1] & 0x3f) << 12)
-@@ -746,24 +746,24 @@ RTDECL(int) RTStrGetCpExInternal(const c
- RTUNICP uc;
-
- /* ASCII ? */
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- {
- uc = uch;
- puch++;
- }
-- else if (uch & BIT(6))
-+ else if (uch & RT_BIT(6))
- {
- /* figure the length and validate the first octet. */
- unsigned cb;
-- if (!(uch & BIT(5)))
-+ if (!(uch & RT_BIT(5)))
- cb = 2;
-- else if (!(uch & BIT(4)))
-+ else if (!(uch & RT_BIT(4)))
- cb = 3;
-- else if (!(uch & BIT(3)))
-+ else if (!(uch & RT_BIT(3)))
- cb = 4;
-- else if (!(uch & BIT(2)))
-+ else if (!(uch & RT_BIT(2)))
- cb = 5;
-- else if (!(uch & BIT(1)))
-+ else if (!(uch & RT_BIT(1)))
- cb = 6;
- else
- {
-@@ -928,9 +928,9 @@ RTDECL(char *) RTStrPrevCp(const char *p
- /* simple char? */
- const unsigned char *puch = (const unsigned char *)psz;
- unsigned uch = *--puch;
-- if (!(uch & BIT(7)))
-+ if (!(uch & RT_BIT(7)))
- return (char *)puch;
-- RTStrAssertMsgReturn(!(uch & BIT(6)), ("uch=%#x\n", uch), (char *)pszStart);
-+ RTStrAssertMsgReturn(!(uch & RT_BIT(6)), ("uch=%#x\n", uch), (char *)pszStart);
-
- /* two or more. */
- uint32_t uMask = 0xffffffc0;
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/CPUM.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/CPUM.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/CPUM.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/CPUM.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -1083,58 +1083,58 @@ static DECLCALLBACK(void) cpumR3CpuIdInf
- {
- uint32_t uEDX = Guest.edx;
- pHlp->pfnPrintf(pHlp, "Features EDX: ");
-- if (uEDX & BIT(0)) pHlp->pfnPrintf(pHlp, " FPU");
-- if (uEDX & BIT(1)) pHlp->pfnPrintf(pHlp, " VME");
-- if (uEDX & BIT(2)) pHlp->pfnPrintf(pHlp, " DE");
-- if (uEDX & BIT(3)) pHlp->pfnPrintf(pHlp, " PSE");
-- if (uEDX & BIT(4)) pHlp->pfnPrintf(pHlp, " TSC");
-- if (uEDX & BIT(5)) pHlp->pfnPrintf(pHlp, " MSR");
-- if (uEDX & BIT(6)) pHlp->pfnPrintf(pHlp, " PAE");
-- if (uEDX & BIT(7)) pHlp->pfnPrintf(pHlp, " MCE");
-- if (uEDX & BIT(8)) pHlp->pfnPrintf(pHlp, " CX8");
-- if (uEDX & BIT(9)) pHlp->pfnPrintf(pHlp, " APIC");
-- if (uEDX & BIT(10)) pHlp->pfnPrintf(pHlp, " 10");
-- if (uEDX & BIT(11)) pHlp->pfnPrintf(pHlp, " SEP");
-- if (uEDX & BIT(12)) pHlp->pfnPrintf(pHlp, " MTRR");
-- if (uEDX & BIT(13)) pHlp->pfnPrintf(pHlp, " PGE");
-- if (uEDX & BIT(14)) pHlp->pfnPrintf(pHlp, " MCA");
-- if (uEDX & BIT(15)) pHlp->pfnPrintf(pHlp, " CMOV");
-- if (uEDX & BIT(16)) pHlp->pfnPrintf(pHlp, " PAT");
-- if (uEDX & BIT(17)) pHlp->pfnPrintf(pHlp, " PSE36");
-- if (uEDX & BIT(18)) pHlp->pfnPrintf(pHlp, " PSN");
-- if (uEDX & BIT(19)) pHlp->pfnPrintf(pHlp, " CLFSH");
-- if (uEDX & BIT(20)) pHlp->pfnPrintf(pHlp, " 20");
-- if (uEDX & BIT(21)) pHlp->pfnPrintf(pHlp, " DS");
-- if (uEDX & BIT(22)) pHlp->pfnPrintf(pHlp, " ACPI");
-- if (uEDX & BIT(23)) pHlp->pfnPrintf(pHlp, " MMX");
-- if (uEDX & BIT(24)) pHlp->pfnPrintf(pHlp, " FXSR");
-- if (uEDX & BIT(25)) pHlp->pfnPrintf(pHlp, " SSE");
-- if (uEDX & BIT(26)) pHlp->pfnPrintf(pHlp, " SSE2");
-- if (uEDX & BIT(27)) pHlp->pfnPrintf(pHlp, " SS");
-- if (uEDX & BIT(28)) pHlp->pfnPrintf(pHlp, " HTT");
-- if (uEDX & BIT(29)) pHlp->pfnPrintf(pHlp, " TM");
-- if (uEDX & BIT(30)) pHlp->pfnPrintf(pHlp, " 30");
-- if (uEDX & BIT(31)) pHlp->pfnPrintf(pHlp, " PBE");
-+ if (uEDX & RT_BIT(0)) pHlp->pfnPrintf(pHlp, " FPU");
-+ if (uEDX & RT_BIT(1)) pHlp->pfnPrintf(pHlp, " VME");
-+ if (uEDX & RT_BIT(2)) pHlp->pfnPrintf(pHlp, " DE");
-+ if (uEDX & RT_BIT(3)) pHlp->pfnPrintf(pHlp, " PSE");
-+ if (uEDX & RT_BIT(4)) pHlp->pfnPrintf(pHlp, " TSC");
-+ if (uEDX & RT_BIT(5)) pHlp->pfnPrintf(pHlp, " MSR");
-+ if (uEDX & RT_BIT(6)) pHlp->pfnPrintf(pHlp, " PAE");
-+ if (uEDX & RT_BIT(7)) pHlp->pfnPrintf(pHlp, " MCE");
-+ if (uEDX & RT_BIT(8)) pHlp->pfnPrintf(pHlp, " CX8");
-+ if (uEDX & RT_BIT(9)) pHlp->pfnPrintf(pHlp, " APIC");
-+ if (uEDX & RT_BIT(10)) pHlp->pfnPrintf(pHlp, " 10");
-+ if (uEDX & RT_BIT(11)) pHlp->pfnPrintf(pHlp, " SEP");
-+ if (uEDX & RT_BIT(12)) pHlp->pfnPrintf(pHlp, " MTRR");
-+ if (uEDX & RT_BIT(13)) pHlp->pfnPrintf(pHlp, " PGE");
-+ if (uEDX & RT_BIT(14)) pHlp->pfnPrintf(pHlp, " MCA");
-+ if (uEDX & RT_BIT(15)) pHlp->pfnPrintf(pHlp, " CMOV");
-+ if (uEDX & RT_BIT(16)) pHlp->pfnPrintf(pHlp, " PAT");
-+ if (uEDX & RT_BIT(17)) pHlp->pfnPrintf(pHlp, " PSE36");
-+ if (uEDX & RT_BIT(18)) pHlp->pfnPrintf(pHlp, " PSN");
-+ if (uEDX & RT_BIT(19)) pHlp->pfnPrintf(pHlp, " CLFSH");
-+ if (uEDX & RT_BIT(20)) pHlp->pfnPrintf(pHlp, " 20");
-+ if (uEDX & RT_BIT(21)) pHlp->pfnPrintf(pHlp, " DS");
-+ if (uEDX & RT_BIT(22)) pHlp->pfnPrintf(pHlp, " ACPI");
-+ if (uEDX & RT_BIT(23)) pHlp->pfnPrintf(pHlp, " MMX");
-+ if (uEDX & RT_BIT(24)) pHlp->pfnPrintf(pHlp, " FXSR");
-+ if (uEDX & RT_BIT(25)) pHlp->pfnPrintf(pHlp, " SSE");
-+ if (uEDX & RT_BIT(26)) pHlp->pfnPrintf(pHlp, " SSE2");
-+ if (uEDX & RT_BIT(27)) pHlp->pfnPrintf(pHlp, " SS");
-+ if (uEDX & RT_BIT(28)) pHlp->pfnPrintf(pHlp, " HTT");
-+ if (uEDX & RT_BIT(29)) pHlp->pfnPrintf(pHlp, " TM");
-+ if (uEDX & RT_BIT(30)) pHlp->pfnPrintf(pHlp, " 30");
-+ if (uEDX & RT_BIT(31)) pHlp->pfnPrintf(pHlp, " PBE");
- pHlp->pfnPrintf(pHlp, "\n");
-
- uint32_t uECX = Guest.ecx;
- pHlp->pfnPrintf(pHlp, "Features ECX: ");
-- if (uECX & BIT(0)) pHlp->pfnPrintf(pHlp, " SSE3");
-- if (uECX & BIT(1)) pHlp->pfnPrintf(pHlp, " 1");
-- if (uECX & BIT(2)) pHlp->pfnPrintf(pHlp, " 2");
-- if (uECX & BIT(3)) pHlp->pfnPrintf(pHlp, " MONITOR");
-- if (uECX & BIT(4)) pHlp->pfnPrintf(pHlp, " DS-CPL");
-- if (uECX & BIT(5)) pHlp->pfnPrintf(pHlp, " VMX");
-- if (uECX & BIT(6)) pHlp->pfnPrintf(pHlp, " 6");
-- if (uECX & BIT(7)) pHlp->pfnPrintf(pHlp, " EST");
-- if (uECX & BIT(8)) pHlp->pfnPrintf(pHlp, " TM2");
-- if (uECX & BIT(9)) pHlp->pfnPrintf(pHlp, " 9");
-- if (uECX & BIT(10)) pHlp->pfnPrintf(pHlp, " CNXT-ID");
-- if (uECX & BIT(11)) pHlp->pfnPrintf(pHlp, " 11");
-- if (uECX & BIT(12)) pHlp->pfnPrintf(pHlp, " 12");
-- if (uECX & BIT(13)) pHlp->pfnPrintf(pHlp, " CX16");
-+ if (uECX & RT_BIT(0)) pHlp->pfnPrintf(pHlp, " SSE3");
-+ if (uECX & RT_BIT(1)) pHlp->pfnPrintf(pHlp, " 1");
-+ if (uECX & RT_BIT(2)) pHlp->pfnPrintf(pHlp, " 2");
-+ if (uECX & RT_BIT(3)) pHlp->pfnPrintf(pHlp, " MONITOR");
-+ if (uECX & RT_BIT(4)) pHlp->pfnPrintf(pHlp, " DS-CPL");
-+ if (uECX & RT_BIT(5)) pHlp->pfnPrintf(pHlp, " VMX");
-+ if (uECX & RT_BIT(6)) pHlp->pfnPrintf(pHlp, " 6");
-+ if (uECX & RT_BIT(7)) pHlp->pfnPrintf(pHlp, " EST");
-+ if (uECX & RT_BIT(8)) pHlp->pfnPrintf(pHlp, " TM2");
-+ if (uECX & RT_BIT(9)) pHlp->pfnPrintf(pHlp, " 9");
-+ if (uECX & RT_BIT(10)) pHlp->pfnPrintf(pHlp, " CNXT-ID");
-+ if (uECX & RT_BIT(11)) pHlp->pfnPrintf(pHlp, " 11");
-+ if (uECX & RT_BIT(12)) pHlp->pfnPrintf(pHlp, " 12");
-+ if (uECX & RT_BIT(13)) pHlp->pfnPrintf(pHlp, " CX16");
- for (unsigned iBit = 14; iBit < 32; iBit++)
-- if (uECX & BIT(iBit))
-+ if (uECX & RT_BIT(iBit))
- pHlp->pfnPrintf(pHlp, " %d", iBit);
- pHlp->pfnPrintf(pHlp, "\n");
- }
-@@ -1255,56 +1255,56 @@ static DECLCALLBACK(void) cpumR3CpuIdInf
- {
- uint32_t uEDX = Guest.edx;
- pHlp->pfnPrintf(pHlp, "Features EDX: ");
-- if (uEDX & BIT(0)) pHlp->pfnPrintf(pHlp, " FPU");
-- if (uEDX & BIT(1)) pHlp->pfnPrintf(pHlp, " VME");
-- if (uEDX & BIT(2)) pHlp->pfnPrintf(pHlp, " DE");
-- if (uEDX & BIT(3)) pHlp->pfnPrintf(pHlp, " PSE");
-- if (uEDX & BIT(4)) pHlp->pfnPrintf(pHlp, " TSC");
-- if (uEDX & BIT(5)) pHlp->pfnPrintf(pHlp, " MSR");
-- if (uEDX & BIT(6)) pHlp->pfnPrintf(pHlp, " PAE");
-- if (uEDX & BIT(7)) pHlp->pfnPrintf(pHlp, " MCE");
-- if (uEDX & BIT(8)) pHlp->pfnPrintf(pHlp, " CX8");
-- if (uEDX & BIT(9)) pHlp->pfnPrintf(pHlp, " APIC");
-- if (uEDX & BIT(10)) pHlp->pfnPrintf(pHlp, " 10");
-- if (uEDX & BIT(11)) pHlp->pfnPrintf(pHlp, " SCR");
-- if (uEDX & BIT(12)) pHlp->pfnPrintf(pHlp, " MTRR");
-- if (uEDX & BIT(13)) pHlp->pfnPrintf(pHlp, " PGE");
-- if (uEDX & BIT(14)) pHlp->pfnPrintf(pHlp, " MCA");
-- if (uEDX & BIT(15)) pHlp->pfnPrintf(pHlp, " CMOV");
-- if (uEDX & BIT(16)) pHlp->pfnPrintf(pHlp, " PAT");
-- if (uEDX & BIT(17)) pHlp->pfnPrintf(pHlp, " PSE36");
-- if (uEDX & BIT(18)) pHlp->pfnPrintf(pHlp, " 18");
-- if (uEDX & BIT(19)) pHlp->pfnPrintf(pHlp, " 19");
-- if (uEDX & BIT(20)) pHlp->pfnPrintf(pHlp, " NX");
-- if (uEDX & BIT(21)) pHlp->pfnPrintf(pHlp, " 21");
-- if (uEDX & BIT(22)) pHlp->pfnPrintf(pHlp, " ExtMMX");
-- if (uEDX & BIT(23)) pHlp->pfnPrintf(pHlp, " MMX");
-- if (uEDX & BIT(24)) pHlp->pfnPrintf(pHlp, " FXSR");
-- if (uEDX & BIT(25)) pHlp->pfnPrintf(pHlp, " FastFXSR");
-- if (uEDX & BIT(26)) pHlp->pfnPrintf(pHlp, " Page1GB");
-- if (uEDX & BIT(27)) pHlp->pfnPrintf(pHlp, " RDTSCP");
-- if (uEDX & BIT(28)) pHlp->pfnPrintf(pHlp, " 28");
-- if (uEDX & BIT(29)) pHlp->pfnPrintf(pHlp, " LongMode");
-- if (uEDX & BIT(30)) pHlp->pfnPrintf(pHlp, " Ext3DNow");
-- if (uEDX & BIT(31)) pHlp->pfnPrintf(pHlp, " 3DNow");
-+ if (uEDX & RT_BIT(0)) pHlp->pfnPrintf(pHlp, " FPU");
-+ if (uEDX & RT_BIT(1)) pHlp->pfnPrintf(pHlp, " VME");
-+ if (uEDX & RT_BIT(2)) pHlp->pfnPrintf(pHlp, " DE");
-+ if (uEDX & RT_BIT(3)) pHlp->pfnPrintf(pHlp, " PSE");
-+ if (uEDX & RT_BIT(4)) pHlp->pfnPrintf(pHlp, " TSC");
-+ if (uEDX & RT_BIT(5)) pHlp->pfnPrintf(pHlp, " MSR");
-+ if (uEDX & RT_BIT(6)) pHlp->pfnPrintf(pHlp, " PAE");
-+ if (uEDX & RT_BIT(7)) pHlp->pfnPrintf(pHlp, " MCE");
-+ if (uEDX & RT_BIT(8)) pHlp->pfnPrintf(pHlp, " CX8");
-+ if (uEDX & RT_BIT(9)) pHlp->pfnPrintf(pHlp, " APIC");
-+ if (uEDX & RT_BIT(10)) pHlp->pfnPrintf(pHlp, " 10");
-+ if (uEDX & RT_BIT(11)) pHlp->pfnPrintf(pHlp, " SCR");
-+ if (uEDX & RT_BIT(12)) pHlp->pfnPrintf(pHlp, " MTRR");
-+ if (uEDX & RT_BIT(13)) pHlp->pfnPrintf(pHlp, " PGE");
-+ if (uEDX & RT_BIT(14)) pHlp->pfnPrintf(pHlp, " MCA");
-+ if (uEDX & RT_BIT(15)) pHlp->pfnPrintf(pHlp, " CMOV");
-+ if (uEDX & RT_BIT(16)) pHlp->pfnPrintf(pHlp, " PAT");
-+ if (uEDX & RT_BIT(17)) pHlp->pfnPrintf(pHlp, " PSE36");
-+ if (uEDX & RT_BIT(18)) pHlp->pfnPrintf(pHlp, " 18");
-+ if (uEDX & RT_BIT(19)) pHlp->pfnPrintf(pHlp, " 19");
-+ if (uEDX & RT_BIT(20)) pHlp->pfnPrintf(pHlp, " NX");
-+ if (uEDX & RT_BIT(21)) pHlp->pfnPrintf(pHlp, " 21");
-+ if (uEDX & RT_BIT(22)) pHlp->pfnPrintf(pHlp, " ExtMMX");
-+ if (uEDX & RT_BIT(23)) pHlp->pfnPrintf(pHlp, " MMX");
-+ if (uEDX & RT_BIT(24)) pHlp->pfnPrintf(pHlp, " FXSR");
-+ if (uEDX & RT_BIT(25)) pHlp->pfnPrintf(pHlp, " FastFXSR");
-+ if (uEDX & RT_BIT(26)) pHlp->pfnPrintf(pHlp, " Page1GB");
-+ if (uEDX & RT_BIT(27)) pHlp->pfnPrintf(pHlp, " RDTSCP");
-+ if (uEDX & RT_BIT(28)) pHlp->pfnPrintf(pHlp, " 28");
-+ if (uEDX & RT_BIT(29)) pHlp->pfnPrintf(pHlp, " LongMode");
-+ if (uEDX & RT_BIT(30)) pHlp->pfnPrintf(pHlp, " Ext3DNow");
-+ if (uEDX & RT_BIT(31)) pHlp->pfnPrintf(pHlp, " 3DNow");
- pHlp->pfnPrintf(pHlp, "\n");
-
- uint32_t uECX = Guest.ecx;
- pHlp->pfnPrintf(pHlp, "Features ECX: ");
-- if (uECX & BIT(0)) pHlp->pfnPrintf(pHlp, " LAHF/SAHF");
-- if (uECX & BIT(1)) pHlp->pfnPrintf(pHlp, " CMPL");
-- if (uECX & BIT(2)) pHlp->pfnPrintf(pHlp, " SVM");
-- if (uECX & BIT(3)) pHlp->pfnPrintf(pHlp, " ExtAPIC");
-- if (uECX & BIT(4)) pHlp->pfnPrintf(pHlp, " CR8L");
-- if (uECX & BIT(5)) pHlp->pfnPrintf(pHlp, " ABM");
-- if (uECX & BIT(6)) pHlp->pfnPrintf(pHlp, " SSE4A");
-- if (uECX & BIT(7)) pHlp->pfnPrintf(pHlp, " MISALNSSE");
-- if (uECX & BIT(8)) pHlp->pfnPrintf(pHlp, " 3DNOWPRF");
-- if (uECX & BIT(9)) pHlp->pfnPrintf(pHlp, " OSVW");
-- if (uECX & BIT(12)) pHlp->pfnPrintf(pHlp, " SKINIT");
-- if (uECX & BIT(13)) pHlp->pfnPrintf(pHlp, " WDT");
-+ if (uECX & RT_BIT(0)) pHlp->pfnPrintf(pHlp, " LAHF/SAHF");
-+ if (uECX & RT_BIT(1)) pHlp->pfnPrintf(pHlp, " CMPL");
-+ if (uECX & RT_BIT(2)) pHlp->pfnPrintf(pHlp, " SVM");
-+ if (uECX & RT_BIT(3)) pHlp->pfnPrintf(pHlp, " ExtAPIC");
-+ if (uECX & RT_BIT(4)) pHlp->pfnPrintf(pHlp, " CR8L");
-+ if (uECX & RT_BIT(5)) pHlp->pfnPrintf(pHlp, " ABM");
-+ if (uECX & RT_BIT(6)) pHlp->pfnPrintf(pHlp, " SSE4A");
-+ if (uECX & RT_BIT(7)) pHlp->pfnPrintf(pHlp, " MISALNSSE");
-+ if (uECX & RT_BIT(8)) pHlp->pfnPrintf(pHlp, " 3DNOWPRF");
-+ if (uECX & RT_BIT(9)) pHlp->pfnPrintf(pHlp, " OSVW");
-+ if (uECX & RT_BIT(12)) pHlp->pfnPrintf(pHlp, " SKINIT");
-+ if (uECX & RT_BIT(13)) pHlp->pfnPrintf(pHlp, " WDT");
- for (unsigned iBit = 5; iBit < 32; iBit++)
-- if (uECX & BIT(iBit))
-+ if (uECX & RT_BIT(iBit))
- pHlp->pfnPrintf(pHlp, " %d", iBit);
- pHlp->pfnPrintf(pHlp, "\n");
- }
-@@ -1315,54 +1315,54 @@ static DECLCALLBACK(void) cpumR3CpuIdInf
- uint32_t uEdxGst = Guest.edx;
- uint32_t uEdxHst = Host.edx;
- pHlp->pfnPrintf(pHlp, "Mnemonic - Description = guest (host)\n");
-- pHlp->pfnPrintf(pHlp, "FPU - x87 FPU on Chip = %d (%d)\n", !!(uEdxGst & BIT( 0)), !!(uEdxHst & BIT( 0)));
-- pHlp->pfnPrintf(pHlp, "VME - Virtual 8086 Mode Enhancements = %d (%d)\n", !!(uEdxGst & BIT( 1)), !!(uEdxHst & BIT( 1)));
-- pHlp->pfnPrintf(pHlp, "DE - Debugging extensions = %d (%d)\n", !!(uEdxGst & BIT( 2)), !!(uEdxHst & BIT( 2)));
-- pHlp->pfnPrintf(pHlp, "PSE - Page Size Extension = %d (%d)\n", !!(uEdxGst & BIT( 3)), !!(uEdxHst & BIT( 3)));
-- pHlp->pfnPrintf(pHlp, "TSC - Time Stamp Counter = %d (%d)\n", !!(uEdxGst & BIT( 4)), !!(uEdxHst & BIT( 4)));
-- pHlp->pfnPrintf(pHlp, "MSR - K86 Model Specific Registers = %d (%d)\n", !!(uEdxGst & BIT( 5)), !!(uEdxHst & BIT( 5)));
-- pHlp->pfnPrintf(pHlp, "PAE - Physical Address Extension = %d (%d)\n", !!(uEdxGst & BIT( 6)), !!(uEdxHst & BIT( 6)));
-- pHlp->pfnPrintf(pHlp, "MCE - Machine Check Exception = %d (%d)\n", !!(uEdxGst & BIT( 7)), !!(uEdxHst & BIT( 7)));
-- pHlp->pfnPrintf(pHlp, "CX8 - CMPXCHG8B instruction = %d (%d)\n", !!(uEdxGst & BIT( 8)), !!(uEdxHst & BIT( 8)));
-- pHlp->pfnPrintf(pHlp, "APIC - APIC On-Chip = %d (%d)\n", !!(uEdxGst & BIT( 9)), !!(uEdxHst & BIT( 9)));
-- pHlp->pfnPrintf(pHlp, "10 - Reserved = %d (%d)\n", !!(uEdxGst & BIT(10)), !!(uEdxHst & BIT(10)));
-- pHlp->pfnPrintf(pHlp, "SEP - SYSCALL and SYSRET = %d (%d)\n", !!(uEdxGst & BIT(11)), !!(uEdxHst & BIT(11)));
-- pHlp->pfnPrintf(pHlp, "MTRR - Memory Type Range Registers = %d (%d)\n", !!(uEdxGst & BIT(12)), !!(uEdxHst & BIT(12)));
-- pHlp->pfnPrintf(pHlp, "PGE - PTE Global Bit = %d (%d)\n", !!(uEdxGst & BIT(13)), !!(uEdxHst & BIT(13)));
-- pHlp->pfnPrintf(pHlp, "MCA - Machine Check Architecture = %d (%d)\n", !!(uEdxGst & BIT(14)), !!(uEdxHst & BIT(14)));
-- pHlp->pfnPrintf(pHlp, "CMOV - Conditional Move Instructions = %d (%d)\n", !!(uEdxGst & BIT(15)), !!(uEdxHst & BIT(15)));
-- pHlp->pfnPrintf(pHlp, "PAT - Page Attribute Table = %d (%d)\n", !!(uEdxGst & BIT(16)), !!(uEdxHst & BIT(16)));
-- pHlp->pfnPrintf(pHlp, "PSE-36 - 36-bit Page Size Extention = %d (%d)\n", !!(uEdxGst & BIT(17)), !!(uEdxHst & BIT(17)));
-- pHlp->pfnPrintf(pHlp, "18 - Reserved = %d (%d)\n", !!(uEdxGst & BIT(18)), !!(uEdxHst & BIT(18)));
-- pHlp->pfnPrintf(pHlp, "19 - Reserved = %d (%d)\n", !!(uEdxGst & BIT(19)), !!(uEdxHst & BIT(19)));
-- pHlp->pfnPrintf(pHlp, "NX - No-Execute Page Protection = %d (%d)\n", !!(uEdxGst & BIT(20)), !!(uEdxHst & BIT(20)));
-- pHlp->pfnPrintf(pHlp, "DS - Debug Store = %d (%d)\n", !!(uEdxGst & BIT(21)), !!(uEdxHst & BIT(21)));
-- pHlp->pfnPrintf(pHlp, "AXMMX - AMD Extensions to MMX Instr. = %d (%d)\n", !!(uEdxGst & BIT(22)), !!(uEdxHst & BIT(22)));
-- pHlp->pfnPrintf(pHlp, "MMX - Intel MMX Technology = %d (%d)\n", !!(uEdxGst & BIT(23)), !!(uEdxHst & BIT(23)));
-- pHlp->pfnPrintf(pHlp, "FXSR - FXSAVE and FXRSTOR Instructions = %d (%d)\n", !!(uEdxGst & BIT(24)), !!(uEdxHst & BIT(24)));
-- pHlp->pfnPrintf(pHlp, "25 - AMD fast FXSAVE and FXRSTOR Instr.= %d (%d)\n", !!(uEdxGst & BIT(25)), !!(uEdxHst & BIT(25)));
-- pHlp->pfnPrintf(pHlp, "26 - Reserved = %d (%d)\n", !!(uEdxGst & BIT(26)), !!(uEdxHst & BIT(26)));
-- pHlp->pfnPrintf(pHlp, "27 - Reserved = %d (%d)\n", !!(uEdxGst & BIT(27)), !!(uEdxHst & BIT(27)));
-- pHlp->pfnPrintf(pHlp, "28 - Reserved = %d (%d)\n", !!(uEdxGst & BIT(28)), !!(uEdxHst & BIT(28)));
-- pHlp->pfnPrintf(pHlp, "29 - AMD Long Mode = %d (%d)\n", !!(uEdxGst & BIT(29)), !!(uEdxHst & BIT(29)));
-- pHlp->pfnPrintf(pHlp, "30 - AMD Extensions to 3DNow = %d (%d)\n", !!(uEdxGst & BIT(30)), !!(uEdxHst & BIT(30)));
-- pHlp->pfnPrintf(pHlp, "31 - AMD 3DNow = %d (%d)\n", !!(uEdxGst & BIT(31)), !!(uEdxHst & BIT(31)));
-+ pHlp->pfnPrintf(pHlp, "FPU - x87 FPU on Chip = %d (%d)\n", !!(uEdxGst & RT_BIT( 0)), !!(uEdxHst & RT_BIT( 0)));
-+ pHlp->pfnPrintf(pHlp, "VME - Virtual 8086 Mode Enhancements = %d (%d)\n", !!(uEdxGst & RT_BIT( 1)), !!(uEdxHst & RT_BIT( 1)));
-+ pHlp->pfnPrintf(pHlp, "DE - Debugging extensions = %d (%d)\n", !!(uEdxGst & RT_BIT( 2)), !!(uEdxHst & RT_BIT( 2)));
-+ pHlp->pfnPrintf(pHlp, "PSE - Page Size Extension = %d (%d)\n", !!(uEdxGst & RT_BIT( 3)), !!(uEdxHst & RT_BIT( 3)));
-+ pHlp->pfnPrintf(pHlp, "TSC - Time Stamp Counter = %d (%d)\n", !!(uEdxGst & RT_BIT( 4)), !!(uEdxHst & RT_BIT( 4)));
-+ pHlp->pfnPrintf(pHlp, "MSR - K86 Model Specific Registers = %d (%d)\n", !!(uEdxGst & RT_BIT( 5)), !!(uEdxHst & RT_BIT( 5)));
-+ pHlp->pfnPrintf(pHlp, "PAE - Physical Address Extension = %d (%d)\n", !!(uEdxGst & RT_BIT( 6)), !!(uEdxHst & RT_BIT( 6)));
-+ pHlp->pfnPrintf(pHlp, "MCE - Machine Check Exception = %d (%d)\n", !!(uEdxGst & RT_BIT( 7)), !!(uEdxHst & RT_BIT( 7)));
-+ pHlp->pfnPrintf(pHlp, "CX8 - CMPXCHG8B instruction = %d (%d)\n", !!(uEdxGst & RT_BIT( 8)), !!(uEdxHst & RT_BIT( 8)));
-+ pHlp->pfnPrintf(pHlp, "APIC - APIC On-Chip = %d (%d)\n", !!(uEdxGst & RT_BIT( 9)), !!(uEdxHst & RT_BIT( 9)));
-+ pHlp->pfnPrintf(pHlp, "10 - Reserved = %d (%d)\n", !!(uEdxGst & RT_BIT(10)), !!(uEdxHst & RT_BIT(10)));
-+ pHlp->pfnPrintf(pHlp, "SEP - SYSCALL and SYSRET = %d (%d)\n", !!(uEdxGst & RT_BIT(11)), !!(uEdxHst & RT_BIT(11)));
-+ pHlp->pfnPrintf(pHlp, "MTRR - Memory Type Range Registers = %d (%d)\n", !!(uEdxGst & RT_BIT(12)), !!(uEdxHst & RT_BIT(12)));
-+ pHlp->pfnPrintf(pHlp, "PGE - PTE Global Bit = %d (%d)\n", !!(uEdxGst & RT_BIT(13)), !!(uEdxHst & RT_BIT(13)));
-+ pHlp->pfnPrintf(pHlp, "MCA - Machine Check Architecture = %d (%d)\n", !!(uEdxGst & RT_BIT(14)), !!(uEdxHst & RT_BIT(14)));
-+ pHlp->pfnPrintf(pHlp, "CMOV - Conditional Move Instructions = %d (%d)\n", !!(uEdxGst & RT_BIT(15)), !!(uEdxHst & RT_BIT(15)));
-+ pHlp->pfnPrintf(pHlp, "PAT - Page Attribute Table = %d (%d)\n", !!(uEdxGst & RT_BIT(16)), !!(uEdxHst & RT_BIT(16)));
-+ pHlp->pfnPrintf(pHlp, "PSE-36 - 36-bit Page Size Extention = %d (%d)\n", !!(uEdxGst & RT_BIT(17)), !!(uEdxHst & RT_BIT(17)));
-+ pHlp->pfnPrintf(pHlp, "18 - Reserved = %d (%d)\n", !!(uEdxGst & RT_BIT(18)), !!(uEdxHst & RT_BIT(18)));
-+ pHlp->pfnPrintf(pHlp, "19 - Reserved = %d (%d)\n", !!(uEdxGst & RT_BIT(19)), !!(uEdxHst & RT_BIT(19)));
-+ pHlp->pfnPrintf(pHlp, "NX - No-Execute Page Protection = %d (%d)\n", !!(uEdxGst & RT_BIT(20)), !!(uEdxHst & RT_BIT(20)));
-+ pHlp->pfnPrintf(pHlp, "DS - Debug Store = %d (%d)\n", !!(uEdxGst & RT_BIT(21)), !!(uEdxHst & RT_BIT(21)));
-+ pHlp->pfnPrintf(pHlp, "AXMMX - AMD Extensions to MMX Instr. = %d (%d)\n", !!(uEdxGst & RT_BIT(22)), !!(uEdxHst & RT_BIT(22)));
-+ pHlp->pfnPrintf(pHlp, "MMX - Intel MMX Technology = %d (%d)\n", !!(uEdxGst & RT_BIT(23)), !!(uEdxHst & RT_BIT(23)));
-+ pHlp->pfnPrintf(pHlp, "FXSR - FXSAVE and FXRSTOR Instructions = %d (%d)\n", !!(uEdxGst & RT_BIT(24)), !!(uEdxHst & RT_BIT(24)));
-+ pHlp->pfnPrintf(pHlp, "25 - AMD fast FXSAVE and FXRSTOR Instr.= %d (%d)\n", !!(uEdxGst & RT_BIT(25)), !!(uEdxHst & RT_BIT(25)));
-+ pHlp->pfnPrintf(pHlp, "26 - Reserved = %d (%d)\n", !!(uEdxGst & RT_BIT(26)), !!(uEdxHst & RT_BIT(26)));
-+ pHlp->pfnPrintf(pHlp, "27 - Reserved = %d (%d)\n", !!(uEdxGst & RT_BIT(27)), !!(uEdxHst & RT_BIT(27)));
-+ pHlp->pfnPrintf(pHlp, "28 - Reserved = %d (%d)\n", !!(uEdxGst & RT_BIT(28)), !!(uEdxHst & RT_BIT(28)));
-+ pHlp->pfnPrintf(pHlp, "29 - AMD Long Mode = %d (%d)\n", !!(uEdxGst & RT_BIT(29)), !!(uEdxHst & RT_BIT(29)));
-+ pHlp->pfnPrintf(pHlp, "30 - AMD Extensions to 3DNow = %d (%d)\n", !!(uEdxGst & RT_BIT(30)), !!(uEdxHst & RT_BIT(30)));
-+ pHlp->pfnPrintf(pHlp, "31 - AMD 3DNow = %d (%d)\n", !!(uEdxGst & RT_BIT(31)), !!(uEdxHst & RT_BIT(31)));
-
- uint32_t uEcxGst = Guest.ecx;
- uint32_t uEcxHst = Host.ecx;
-- pHlp->pfnPrintf(pHlp, "LahfSahf - LAHF/SAHF in 64-bit mode = %d (%d)\n", !!(uEcxGst & BIT( 0)), !!(uEcxHst & BIT( 0)));
-- pHlp->pfnPrintf(pHlp, "CmpLegacy - Core MP legacy mode (depr) = %d (%d)\n", !!(uEcxGst & BIT( 1)), !!(uEcxHst & BIT( 1)));
-- pHlp->pfnPrintf(pHlp, "SVM - AMD VM Extensions = %d (%d)\n", !!(uEcxGst & BIT( 2)), !!(uEcxHst & BIT( 2)));
-- pHlp->pfnPrintf(pHlp, "APIC registers starting at 0x400 = %d (%d)\n", !!(uEcxGst & BIT( 3)), !!(uEcxHst & BIT( 3)));
-- pHlp->pfnPrintf(pHlp, "AltMovCR8 - LOCK MOV CR0 means MOV CR8 = %d (%d)\n", !!(uEcxGst & BIT( 4)), !!(uEcxHst & BIT( 4)));
-- pHlp->pfnPrintf(pHlp, "Advanced bit manipulation = %d (%d)\n", !!(uEcxGst & BIT( 5)), !!(uEcxHst & BIT( 5)));
-- pHlp->pfnPrintf(pHlp, "SSE4A instruction support = %d (%d)\n", !!(uEcxGst & BIT( 6)), !!(uEcxHst & BIT( 6)));
-- pHlp->pfnPrintf(pHlp, "Misaligned SSE mode = %d (%d)\n", !!(uEcxGst & BIT( 7)), !!(uEcxHst & BIT( 7)));
-- pHlp->pfnPrintf(pHlp, "PREFETCH and PREFETCHW instruction = %d (%d)\n", !!(uEcxGst & BIT( 8)), !!(uEcxHst & BIT( 8)));
-- pHlp->pfnPrintf(pHlp, "OS visible workaround = %d (%d)\n", !!(uEcxGst & BIT( 9)), !!(uEcxHst & BIT( 9)));
-+ pHlp->pfnPrintf(pHlp, "LahfSahf - LAHF/SAHF in 64-bit mode = %d (%d)\n", !!(uEcxGst & RT_BIT( 0)), !!(uEcxHst & RT_BIT( 0)));
-+ pHlp->pfnPrintf(pHlp, "CmpLegacy - Core MP legacy mode (depr) = %d (%d)\n", !!(uEcxGst & RT_BIT( 1)), !!(uEcxHst & RT_BIT( 1)));
-+ pHlp->pfnPrintf(pHlp, "SVM - AMD VM Extensions = %d (%d)\n", !!(uEcxGst & RT_BIT( 2)), !!(uEcxHst & RT_BIT( 2)));
-+ pHlp->pfnPrintf(pHlp, "APIC registers starting at 0x400 = %d (%d)\n", !!(uEcxGst & RT_BIT( 3)), !!(uEcxHst & RT_BIT( 3)));
-+ pHlp->pfnPrintf(pHlp, "AltMovCR8 - LOCK MOV CR0 means MOV CR8 = %d (%d)\n", !!(uEcxGst & RT_BIT( 4)), !!(uEcxHst & RT_BIT( 4)));
-+ pHlp->pfnPrintf(pHlp, "Advanced bit manipulation = %d (%d)\n", !!(uEcxGst & RT_BIT( 5)), !!(uEcxHst & RT_BIT( 5)));
-+ pHlp->pfnPrintf(pHlp, "SSE4A instruction support = %d (%d)\n", !!(uEcxGst & RT_BIT( 6)), !!(uEcxHst & RT_BIT( 6)));
-+ pHlp->pfnPrintf(pHlp, "Misaligned SSE mode = %d (%d)\n", !!(uEcxGst & RT_BIT( 7)), !!(uEcxHst & RT_BIT( 7)));
-+ pHlp->pfnPrintf(pHlp, "PREFETCH and PREFETCHW instruction = %d (%d)\n", !!(uEcxGst & RT_BIT( 8)), !!(uEcxHst & RT_BIT( 8)));
-+ pHlp->pfnPrintf(pHlp, "OS visible workaround = %d (%d)\n", !!(uEcxGst & RT_BIT( 9)), !!(uEcxHst & RT_BIT( 9)));
- pHlp->pfnPrintf(pHlp, "11:10 - Reserved = %#x (%#x)\n", (uEcxGst >> 10) & 3, (uEcxHst >> 10) & 3);
-- pHlp->pfnPrintf(pHlp, "SKINIT, STGI, and DEV support = %d (%d)\n", !!(uEcxGst & BIT(12)), !!(uEcxHst & BIT(12)));
-- pHlp->pfnPrintf(pHlp, "Watchdog timer support. = %d (%d)\n", !!(uEcxGst & BIT(13)), !!(uEcxHst & BIT(13)));
-+ pHlp->pfnPrintf(pHlp, "SKINIT, STGI, and DEV support = %d (%d)\n", !!(uEcxGst & RT_BIT(12)), !!(uEcxHst & RT_BIT(12)));
-+ pHlp->pfnPrintf(pHlp, "Watchdog timer support. = %d (%d)\n", !!(uEcxGst & RT_BIT(13)), !!(uEcxHst & RT_BIT(13)));
- pHlp->pfnPrintf(pHlp, "31:14 - Reserved = %#x (%#x)\n", uEcxGst >> 14, uEcxHst >> 14);
- }
- }
-@@ -1462,14 +1462,14 @@ static DECLCALLBACK(void) cpumR3CpuIdInf
- uint32_t uEDX = pVM->cpum.s.aGuestCpuIdExt[7].edx;
-
- pHlp->pfnPrintf(pHlp, "APM Features: ");
-- if (uEDX & BIT(0)) pHlp->pfnPrintf(pHlp, " TS");
-- if (uEDX & BIT(1)) pHlp->pfnPrintf(pHlp, " FID");
-- if (uEDX & BIT(2)) pHlp->pfnPrintf(pHlp, " VID");
-- if (uEDX & BIT(3)) pHlp->pfnPrintf(pHlp, " TTP");
-- if (uEDX & BIT(4)) pHlp->pfnPrintf(pHlp, " TM");
-- if (uEDX & BIT(5)) pHlp->pfnPrintf(pHlp, " STC");
-+ if (uEDX & RT_BIT(0)) pHlp->pfnPrintf(pHlp, " TS");
-+ if (uEDX & RT_BIT(1)) pHlp->pfnPrintf(pHlp, " FID");
-+ if (uEDX & RT_BIT(2)) pHlp->pfnPrintf(pHlp, " VID");
-+ if (uEDX & RT_BIT(3)) pHlp->pfnPrintf(pHlp, " TTP");
-+ if (uEDX & RT_BIT(4)) pHlp->pfnPrintf(pHlp, " TM");
-+ if (uEDX & RT_BIT(5)) pHlp->pfnPrintf(pHlp, " STC");
- for (unsigned iBit = 6; iBit < 32; iBit++)
-- if (uEDX & BIT(iBit))
-+ if (uEDX & RT_BIT(iBit))
- pHlp->pfnPrintf(pHlp, " %d", iBit);
- pHlp->pfnPrintf(pHlp, "\n");
- }
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/CPUMInternal.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/CPUMInternal.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/CPUMInternal.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/CPUMInternal.h 2007-12-18 14:54:48.000000000 +0000
-@@ -49,7 +49,7 @@
- /** Type mask. */
- #define CPUM_HANDLER_TYPEMASK 0xff
- /** If set EBP points to the CPUMCTXCORE that's being used. */
--#define CPUM_HANDLER_CTXCORE_IN_EBP BIT(31)
-+#define CPUM_HANDLER_CTXCORE_IN_EBP RT_BIT(31)
- /** @} */
-
-
-@@ -57,18 +57,18 @@
- * (Don't forget to sync this with CPUMInternal.mac!)
- * @{ */
- /** Used the FPU, SSE or such stuff. */
--#define CPUM_USED_FPU BIT(0)
-+#define CPUM_USED_FPU RT_BIT(0)
- /** Used the FPU, SSE or such stuff since last we were in REM.
- * REM syncing is clearing this, lazy FPU is setting it. */
--#define CPUM_USED_FPU_SINCE_REM BIT(1)
-+#define CPUM_USED_FPU_SINCE_REM RT_BIT(1)
- /** Host OS is using SYSENTER and we must NULL the CS. */
--#define CPUM_USE_SYSENTER BIT(2)
-+#define CPUM_USE_SYSENTER RT_BIT(2)
- /** Host OS is using SYSENTER and we must NULL the CS. */
--#define CPUM_USE_SYSCALL BIT(3)
-+#define CPUM_USE_SYSCALL RT_BIT(3)
- /** Debug registers are used by host and must be disabled. */
--#define CPUM_USE_DEBUG_REGS_HOST BIT(4)
-+#define CPUM_USE_DEBUG_REGS_HOST RT_BIT(4)
- /** Enabled use of debug registers in guest context. */
--#define CPUM_USE_DEBUG_REGS BIT(5)
-+#define CPUM_USE_DEBUG_REGS RT_BIT(5)
- /** @} */
-
- /* Sanity check. */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/CPUMInternal.mac virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/CPUMInternal.mac
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/CPUMInternal.mac 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/CPUMInternal.mac 2007-12-18 14:54:48.000000000 +0000
-@@ -16,12 +16,12 @@
-
- %include "VBox/asmdefs.mac"
-
--%define CPUM_USED_FPU BIT(0)
--%define CPUM_USED_FPU_SINCE_REM BIT(1)
--%define CPUM_USE_SYSENTER BIT(2)
--%define CPUM_USE_SYSCALL BIT(3)
--%define CPUM_USE_DEBUG_REGS_HOST BIT(4)
--%define CPUM_USE_DEBUG_REGS BIT(5)
-+%define CPUM_USED_FPU RT_BIT(0)
-+%define CPUM_USED_FPU_SINCE_REM RT_BIT(1)
-+%define CPUM_USE_SYSENTER RT_BIT(2)
-+%define CPUM_USE_SYSCALL RT_BIT(3)
-+%define CPUM_USE_DEBUG_REGS_HOST RT_BIT(4)
-+%define CPUM_USE_DEBUG_REGS RT_BIT(5)
-
- %define CPUM_HANDLER_DS 1
- %define CPUM_HANDLER_ES 2
-@@ -29,7 +29,7 @@
- %define CPUM_HANDLER_GS 4
- %define CPUM_HANDLER_IRET 5
- %define CPUM_HANDLER_TYPEMASK 0ffh
--%define CPUM_HANDLER_CTXCORE_IN_EBP BIT(31)
-+%define CPUM_HANDLER_CTXCORE_IN_EBP RT_BIT(31)
-
- %define VMMGCRET_USED_FPU 040000000h
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/HWACCMInternal.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/HWACCMInternal.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/HWACCMInternal.h 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/HWACCMInternal.h 2007-12-18 14:54:48.000000000 +0000
-@@ -52,18 +52,18 @@ __BEGIN_DECLS
- * have been changed since last they were reset.
- * @{
- */
--#define HWACCM_CHANGED_GUEST_FPU BIT(0)
--#define HWACCM_CHANGED_GUEST_CR0 BIT(1)
--#define HWACCM_CHANGED_GUEST_CR3 BIT(2)
--#define HWACCM_CHANGED_GUEST_CR4 BIT(3)
--#define HWACCM_CHANGED_GUEST_GDTR BIT(4)
--#define HWACCM_CHANGED_GUEST_IDTR BIT(5)
--#define HWACCM_CHANGED_GUEST_LDTR BIT(6)
--#define HWACCM_CHANGED_GUEST_TR BIT(7)
--#define HWACCM_CHANGED_GUEST_SYSENTER_MSR BIT(8)
--#define HWACCM_CHANGED_GUEST_SEGMENT_REGS BIT(9)
--#define HWACCM_CHANGED_GUEST_DEBUG BIT(10)
--#define HWACCM_CHANGED_HOST_CONTEXT BIT(11)
-+#define HWACCM_CHANGED_GUEST_FPU RT_BIT(0)
-+#define HWACCM_CHANGED_GUEST_CR0 RT_BIT(1)
-+#define HWACCM_CHANGED_GUEST_CR3 RT_BIT(2)
-+#define HWACCM_CHANGED_GUEST_CR4 RT_BIT(3)
-+#define HWACCM_CHANGED_GUEST_GDTR RT_BIT(4)
-+#define HWACCM_CHANGED_GUEST_IDTR RT_BIT(5)
-+#define HWACCM_CHANGED_GUEST_LDTR RT_BIT(6)
-+#define HWACCM_CHANGED_GUEST_TR RT_BIT(7)
-+#define HWACCM_CHANGED_GUEST_SYSENTER_MSR RT_BIT(8)
-+#define HWACCM_CHANGED_GUEST_SEGMENT_REGS RT_BIT(9)
-+#define HWACCM_CHANGED_GUEST_DEBUG RT_BIT(10)
-+#define HWACCM_CHANGED_HOST_CONTEXT RT_BIT(11)
-
- #define HWACCM_CHANGED_ALL ( HWACCM_CHANGED_GUEST_SEGMENT_REGS \
- | HWACCM_CHANGED_GUEST_CR0 \
-@@ -97,10 +97,10 @@ __BEGIN_DECLS
- * Currently #NM and #PF only
- */
- #ifdef VBOX_STRICT
--#define HWACCM_VMX_TRAP_MASK BIT(0) | BIT(7) | BIT(14) | BIT(6) | BIT(11) | BIT(12) | BIT(13) | BIT(16)
-+#define HWACCM_VMX_TRAP_MASK RT_BIT(0) | RT_BIT(7) | RT_BIT(14) | RT_BIT(6) | RT_BIT(11) | RT_BIT(12) | RT_BIT(13) | RT_BIT(16)
- #define HWACCM_SVM_TRAP_MASK HWACCM_VMX_TRAP_MASK
- #else
--#define HWACCM_VMX_TRAP_MASK BIT(7) | BIT(14)
-+#define HWACCM_VMX_TRAP_MASK RT_BIT(7) | RT_BIT(14)
- #define HWACCM_SVM_TRAP_MASK HWACCM_VMX_TRAP_MASK
- #endif
- /** @} */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/CSAMInternal.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/CSAMInternal.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/CSAMInternal.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/CSAMInternal.h 2007-12-18 14:54:48.000000000 +0000
-@@ -35,7 +35,7 @@
- #ifndef PGM_PTFLAGS_CSAM_VALIDATED
- /** Scanned and approved by CSAM (tm). */
- /** NOTE: Must be identical to the one defined in PGMInternal.h!! */
--#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
-+#define PGM_PTFLAGS_CSAM_VALIDATED RT_BIT_64(11)
- #endif
-
- /** @} */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/PATMA.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/PATMA.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/PATMA.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/PATMA.h 2007-12-18 14:54:48.000000000 +0000
-@@ -95,9 +95,9 @@
- #define PATM_ACTION_MAGIC 0xABCD4321
-
- /** PATM_TEMP_RESTORE_FLAGS */
--#define PATM_RESTORE_EAX BIT(0)
--#define PATM_RESTORE_ECX BIT(1)
--#define PATM_RESTORE_EDI BIT(2)
-+#define PATM_RESTORE_EAX RT_BIT(0)
-+#define PATM_RESTORE_ECX RT_BIT(1)
-+#define PATM_RESTORE_EDI RT_BIT(2)
-
- typedef struct
- {
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/PATMA.mac virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/PATMA.mac
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/PATMA.mac 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/PATMA.mac 2007-12-18 14:54:48.000000000 +0000
-@@ -92,9 +92,9 @@
- ;/* Magic dword found in ecx for patm pending actions. */
- %define PATM_ACTION_MAGIC 0xABCD4321
-
--%define PATM_RESTORE_EAX BIT(0)
--%define PATM_RESTORE_ECX BIT(1)
--%define PATM_RESTORE_EDI BIT(2)
-+%define PATM_RESTORE_EAX RT_BIT(0)
-+%define PATM_RESTORE_ECX RT_BIT(1)
-+%define PATM_RESTORE_EDI RT_BIT(2)
-
-
- ;/* For indirect calls/jump (identical in PATMA.h & PATMA.mac!) */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/PATMInternal.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/PATMInternal.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PATM/PATMInternal.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PATM/PATMInternal.h 2007-12-18 14:54:48.000000000 +0000
-@@ -40,32 +40,32 @@
- #define MAX_PATCH_SIZE (1024*4)
-
- /*
-- * Internal patch type flags (starts at BIT(11))
-+ * Internal patch type flags (starts at RT_BIT(11))
- */
-
--#define PATMFL_CHECK_SIZE BIT64(11)
--#define PATMFL_FOUND_PATCHEND BIT64(12)
--#define PATMFL_SINGLE_INSTRUCTION BIT64(13)
--#define PATMFL_SYSENTER_XP BIT64(14)
--#define PATMFL_JUMP_CONFLICT BIT64(15)
--#define PATMFL_READ_ORIGINAL_BYTES BIT64(16) /** opcode might have already been patched */
--#define PATMFL_INT3_REPLACEMENT BIT64(17)
--#define PATMFL_SUPPORT_CALLS BIT64(18)
--#define PATMFL_SUPPORT_INDIRECT_CALLS BIT64(19)
--#define PATMFL_IDTHANDLER_WITHOUT_ENTRYPOINT BIT64(20) /** internal flag to avoid duplicate entrypoints */
--#define PATMFL_INHIBIT_IRQS BIT64(21) /** temporary internal flag */
--#define PATMFL_GENERATE_JUMPTOGUEST BIT64(22) /** temporary internal flag */
--#define PATMFL_RECOMPILE_NEXT BIT64(23) /** for recompilation of the next instruction */
--#define PATMFL_CODE_MONITORED BIT64(24) /** code pages of guest monitored for self-modifying code. */
--#define PATMFL_CALLABLE_AS_FUNCTION BIT64(25) /** cli and pushf blocks can be used as callable functions. */
--#define PATMFL_GLOBAL_FUNCTIONS BIT64(26) /** fake patch for global patm functions. */
--#define PATMFL_TRAMPOLINE BIT64(27) /** trampoline patch that clears PATM_INTERRUPTFLAG and jumps to patch destination */
--#define PATMFL_GENERATE_SETPIF BIT64(28) /** generate set PIF for the next instruction */
--#define PATMFL_INSTR_HINT BIT64(29) /** Generate patch, but don't activate it. */
--#define PATMFL_PATCHED_GUEST_CODE BIT64(30) /** Patched guest code. */
--#define PATMFL_MUST_INSTALL_PATCHJMP BIT64(31) /** Need to patch guest code in order to activate patch. */
--#define PATMFL_INT3_REPLACEMENT_BLOCK BIT64(32) /** int 3 replacement block */
--#define PATMFL_EXTERNAL_JUMP_INSIDE BIT64(33) /** A trampoline patch was created that jumps to an instruction in the patch block */
-+#define PATMFL_CHECK_SIZE RT_BIT_64(11)
-+#define PATMFL_FOUND_PATCHEND RT_BIT_64(12)
-+#define PATMFL_SINGLE_INSTRUCTION RT_BIT_64(13)
-+#define PATMFL_SYSENTER_XP RT_BIT_64(14)
-+#define PATMFL_JUMP_CONFLICT RT_BIT_64(15)
-+#define PATMFL_READ_ORIGINAL_BYTES RT_BIT_64(16) /** opcode might have already been patched */
-+#define PATMFL_INT3_REPLACEMENT RT_BIT_64(17)
-+#define PATMFL_SUPPORT_CALLS RT_BIT_64(18)
-+#define PATMFL_SUPPORT_INDIRECT_CALLS RT_BIT_64(19)
-+#define PATMFL_IDTHANDLER_WITHOUT_ENTRYPOINT RT_BIT_64(20) /** internal flag to avoid duplicate entrypoints */
-+#define PATMFL_INHIBIT_IRQS RT_BIT_64(21) /** temporary internal flag */
-+#define PATMFL_GENERATE_JUMPTOGUEST RT_BIT_64(22) /** temporary internal flag */
-+#define PATMFL_RECOMPILE_NEXT RT_BIT_64(23) /** for recompilation of the next instruction */
-+#define PATMFL_CODE_MONITORED RT_BIT_64(24) /** code pages of guest monitored for self-modifying code. */
-+#define PATMFL_CALLABLE_AS_FUNCTION RT_BIT_64(25) /** cli and pushf blocks can be used as callable functions. */
-+#define PATMFL_GLOBAL_FUNCTIONS RT_BIT_64(26) /** fake patch for global patm functions. */
-+#define PATMFL_TRAMPOLINE RT_BIT_64(27) /** trampoline patch that clears PATM_INTERRUPTFLAG and jumps to patch destination */
-+#define PATMFL_GENERATE_SETPIF RT_BIT_64(28) /** generate set PIF for the next instruction */
-+#define PATMFL_INSTR_HINT RT_BIT_64(29) /** Generate patch, but don't activate it. */
-+#define PATMFL_PATCHED_GUEST_CODE RT_BIT_64(30) /** Patched guest code. */
-+#define PATMFL_MUST_INSTALL_PATCHJMP RT_BIT_64(31) /** Need to patch guest code in order to activate patch. */
-+#define PATMFL_INT3_REPLACEMENT_BLOCK RT_BIT_64(32) /** int 3 replacement block */
-+#define PATMFL_EXTERNAL_JUMP_INSIDE RT_BIT_64(33) /** A trampoline patch was created that jumps to an instruction in the patch block */
-
- #define SIZEOF_NEARJUMP8 2 //opcode byte + 1 byte relative offset
- #define SIZEOF_NEARJUMP16 3 //opcode byte + 2 byte relative offset
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PGM.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PGM.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PGM.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PGM.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -2522,7 +2522,7 @@ static int pgmR3DumpHierarchyHCPaePT(PV
- Pte.n.u1PAT ? "AT" : "--",
- Pte.n.u1NoExecute ? "NX" : "--",
- Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
-- Pte.u & BIT(10) ? '1' : '0',
-+ Pte.u & RT_BIT(10) ? '1' : '0',
- Pte.u & PGM_PTFLAGS_CSAM_VALIDATED? 'v' : '-',
- Pte.u & X86_PTE_PAE_PG_MASK);
- }
-@@ -2573,7 +2573,7 @@ static int pgmR3DumpHierarchyHCPaePD(PV
- Pde.b.u1CacheDisable? "CD" : "--",
- Pde.b.u1PAT ? "AT" : "--",
- Pde.b.u1NoExecute ? "NX" : "--",
-- Pde.u & BIT64(9) ? '1' : '0',
-+ Pde.u & RT_BIT_64(9) ? '1' : '0',
- Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
- Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
- Pde.u & X86_PDE_PAE_PG_MASK);
-@@ -2592,7 +2592,7 @@ static int pgmR3DumpHierarchyHCPaePD(PV
- Pde.n.u1WriteThru ? "WT" : "--",
- Pde.n.u1CacheDisable? "CD" : "--",
- Pde.n.u1NoExecute ? "NX" : "--",
-- Pde.u & BIT64(9) ? '1' : '0',
-+ Pde.u & RT_BIT_64(9) ? '1' : '0',
- Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
- Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
- Pde.u & X86_PDE_PAE_PG_MASK);
-@@ -2679,9 +2679,9 @@ static int pgmR3DumpHierarchyHCPaePDPTR
- Pdpe.n.u1CacheDisable? "CD" : "--",
- Pdpe.n.u3Reserved & 2? "!" : "..",/* mbz */
- Pdpe.n.u1NoExecute ? "NX" : "--",
-- Pdpe.u & BIT(9) ? '1' : '0',
-+ Pdpe.u & RT_BIT(9) ? '1' : '0',
- Pdpe.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
-- Pdpe.u & BIT(11) ? '1' : '0',
-+ Pdpe.u & RT_BIT(11) ? '1' : '0',
- Pdpe.u & X86_PDPE_PG_MASK);
- else
- pHlp->pfnPrintf(pHlp, /*P R S A D G WT CD AT NX 4M a p ? */
-@@ -2696,9 +2696,9 @@ static int pgmR3DumpHierarchyHCPaePDPTR
- Pdpe.n.u1CacheDisable? "CD" : "--",
- Pdpe.n.u3Reserved & 2? "!" : "..",/* mbz */
- Pdpe.n.u1NoExecute ? "NX" : "--",
-- Pdpe.u & BIT(9) ? '1' : '0',
-+ Pdpe.u & RT_BIT(9) ? '1' : '0',
- Pdpe.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
-- Pdpe.u & BIT(11) ? '1' : '0',
-+ Pdpe.u & RT_BIT(11) ? '1' : '0',
- Pdpe.u & X86_PDPE_PG_MASK);
- if (cMaxDepth >= 1)
- {
-@@ -2751,9 +2751,9 @@ static int pgmR3DumpHierarchyHcPaePML4(P
- Pml4e.n.u1CacheDisable? "CD" : "--",
- Pml4e.n.u3Reserved & 2? "!" : "..",/* mbz */
- Pml4e.n.u1NoExecute ? "NX" : "--",
-- Pml4e.u & BIT(9) ? '1' : '0',
-+ Pml4e.u & RT_BIT(9) ? '1' : '0',
- Pml4e.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
-- Pml4e.u & BIT(11) ? '1' : '0',
-+ Pml4e.u & RT_BIT(11) ? '1' : '0',
- Pml4e.u & X86_PML4E_PG_MASK);
-
- if (cMaxDepth >= 1)
-@@ -2796,7 +2796,7 @@ int pgmR3DumpHierarchyHC32BitPT(PVM pVM
- Pte.n.u1CacheDisable? "CD" : "--",
- Pte.n.u1PAT ? "AT" : "--",
- Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
-- Pte.u & BIT(10) ? '1' : '0',
-+ Pte.u & RT_BIT(10) ? '1' : '0',
- Pte.u & PGM_PTFLAGS_CSAM_VALIDATED ? 'v' : '-',
- Pte.u & X86_PDE_PG_MASK);
- }
-@@ -2843,7 +2843,7 @@ int pgmR3DumpHierarchyHC32BitPD(PVM pVM
- Pde.b.u1WriteThru ? "WT" : "--",
- Pde.b.u1CacheDisable? "CD" : "--",
- Pde.b.u1PAT ? "AT" : "--",
-- Pde.u & BIT64(9) ? '1' : '0',
-+ Pde.u & RT_BIT_64(9) ? '1' : '0',
- Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
- Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
- Pde.u & X86_PDE4M_PG_MASK);
-@@ -2859,7 +2859,7 @@ int pgmR3DumpHierarchyHC32BitPD(PVM pVM
- Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
- Pde.n.u1WriteThru ? "WT" : "--",
- Pde.n.u1CacheDisable? "CD" : "--",
-- Pde.u & BIT64(9) ? '1' : '0',
-+ Pde.u & RT_BIT_64(9) ? '1' : '0',
- Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
- Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
- Pde.u & X86_PDE_PG_MASK);
-@@ -2926,7 +2926,7 @@ int pgmR3DumpHierarchyGC32BitPT(PVM pVM,
- Pte.n.u1CacheDisable? "CD" : "--",
- Pte.n.u1PAT ? "AT" : "--",
- Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
-- Pte.u & BIT(10) ? '1' : '0',
-+ Pte.u & RT_BIT(10) ? '1' : '0',
- Pte.u & PGM_PTFLAGS_CSAM_VALIDATED ? 'v' : '-',
- Pte.u & X86_PDE_PG_MASK));
-
-@@ -3006,9 +3006,9 @@ PGMR3DECL(int) PGMR3DumpHierarchyGC(PVM
- Pde.b.u1WriteThru ? "WT" : "--",
- Pde.b.u1CacheDisable? "CD" : "--",
- Pde.b.u1PAT ? "AT" : "--",
-- Pde.u & BIT(9) ? '1' : '0',
-- Pde.u & BIT(10) ? '1' : '0',
-- Pde.u & BIT(11) ? '1' : '0',
-+ Pde.u & RT_BIT(9) ? '1' : '0',
-+ Pde.u & RT_BIT(10) ? '1' : '0',
-+ Pde.u & RT_BIT(11) ? '1' : '0',
- Pde.u & X86_PDE4M_PG_MASK));
- /** @todo PhysSearch */
- else
-@@ -3023,9 +3023,9 @@ PGMR3DECL(int) PGMR3DumpHierarchyGC(PVM
- Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
- Pde.n.u1WriteThru ? "WT" : "--",
- Pde.n.u1CacheDisable? "CD" : "--",
-- Pde.u & BIT(9) ? '1' : '0',
-- Pde.u & BIT(10) ? '1' : '0',
-- Pde.u & BIT(11) ? '1' : '0',
-+ Pde.u & RT_BIT(9) ? '1' : '0',
-+ Pde.u & RT_BIT(10) ? '1' : '0',
-+ Pde.u & RT_BIT(11) ? '1' : '0',
- Pde.u & X86_PDE_PG_MASK));
- ////if (cMaxDepth >= 1)
- {
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PGMInternal.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PGMInternal.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/PGMInternal.h 2007-08-31 12:42:12.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/PGMInternal.h 2007-12-18 14:54:48.000000000 +0000
-@@ -167,7 +167,7 @@
- * @{ */
- /** The entry is a permanent one and it's must always be present.
- * Never free such an entry. */
--#define PGM_PLXFLAGS_PERMANENT BIT64(10)
-+#define PGM_PLXFLAGS_PERMANENT RT_BIT_64(10)
- /** @} */
-
- /** @name Page directory flags.
-@@ -175,9 +175,9 @@
- * the page directory entries.
- * @{ */
- /** Mapping (hypervisor allocated pagetable). */
--#define PGM_PDFLAGS_MAPPING BIT64(10)
-+#define PGM_PDFLAGS_MAPPING RT_BIT_64(10)
- /** Made read-only to facilitate dirty bit tracking. */
--#define PGM_PDFLAGS_TRACK_DIRTY BIT64(11)
-+#define PGM_PDFLAGS_TRACK_DIRTY RT_BIT_64(11)
- /** @} */
-
- /** @name Page flags.
-@@ -185,13 +185,13 @@
- * the page entries.
- * @{ */
- /** Made read-only to facilitate dirty bit tracking. */
--#define PGM_PTFLAGS_TRACK_DIRTY BIT64(9)
-+#define PGM_PTFLAGS_TRACK_DIRTY RT_BIT_64(9)
-
- #ifndef PGM_PTFLAGS_CSAM_VALIDATED
- /** Scanned and approved by CSAM (tm).
- * NOTE: Must be identical to the one defined in CSAMInternal.h!!
- * @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
--#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
-+#define PGM_PTFLAGS_CSAM_VALIDATED RT_BIT_64(11)
- #endif
- /** @} */
-
-@@ -415,11 +415,11 @@ typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VI
-
- /** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
- * node is in the tree. */
--#define PGMPHYS2VIRTHANDLER_IN_TREE BIT(0)
-+#define PGMPHYS2VIRTHANDLER_IN_TREE RT_BIT(0)
- /** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
- * node is in the head of an alias chain.
- * The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
--#define PGMPHYS2VIRTHANDLER_IS_HEAD BIT(1)
-+#define PGMPHYS2VIRTHANDLER_IS_HEAD RT_BIT(1)
- /** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
- #define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
-
-@@ -1734,13 +1734,13 @@ typedef struct PGM
- * @{
- */
- /** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
--#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL BIT(0)
-+#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL RT_BIT(0)
- /** Always sync CR3. */
--#define PGM_SYNC_ALWAYS BIT(1)
-+#define PGM_SYNC_ALWAYS RT_BIT(1)
- /** Check monitoring on next CR3 (re)load and invalidate page. */
--#define PGM_SYNC_MONITOR_CR3 BIT(2)
-+#define PGM_SYNC_MONITOR_CR3 RT_BIT(2)
- /** Clear the page pool (a light weight flush). */
--#define PGM_SYNC_CLEAR_PGM_POOL BIT(8)
-+#define PGM_SYNC_CLEAR_PGM_POOL RT_BIT(8)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/TM.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/TM.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/TM.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/TM.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -522,7 +522,7 @@ static bool tmR3HasFixedTSC(void)
- if (uEAX >= 0x80000007)
- {
- ASMCpuId(0x80000007, &uEAX, &uEBX, &uECX, &uEDX);
-- if (uEDX & BIT(8) /* TscInvariant */)
-+ if (uEDX & RT_BIT(8) /* TscInvariant */)
- return true;
- }
- }
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/TRPMInternal.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/TRPMInternal.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/TRPMInternal.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/TRPMInternal.h 2007-12-18 14:54:48.000000000 +0000
-@@ -59,9 +59,9 @@ __BEGIN_DECLS
- /** Traps on IRET. */
- #define TRPM_TRAP_IN_IRET 5
- /** Set if this is a V86 resume. */
--#define TRPM_TRAP_IN_V86 BIT(30)
-+#define TRPM_TRAP_IN_V86 RT_BIT(30)
- /** If set this is a hypervisor register set. If cleared it's a guest set. */
--#define TRPM_TRAP_IN_HYPER BIT(31)
-+#define TRPM_TRAP_IN_HYPER RT_BIT(31)
- /** @} */
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/TRPMInternal.mac virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/TRPMInternal.mac
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/TRPMInternal.mac 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/TRPMInternal.mac 2007-12-18 14:54:48.000000000 +0000
-@@ -22,8 +22,8 @@
- %define TRPM_TRAP_IN_MOV_ES 3
- %define TRPM_TRAP_IN_MOV_DS 4
- %define TRPM_TRAP_IN_IRET 5
--%define TRPM_TRAP_IN_V86 BIT(30)
--%define TRPM_TRAP_IN_HYPER BIT(31)
-+%define TRPM_TRAP_IN_V86 RT_BIT(30)
-+%define TRPM_TRAP_IN_HYPER RT_BIT(31)
-
-
- struc TRPM
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMAll/PGMAllBth.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMAll/PGMAllBth.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMAll/PGMAllBth.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMAll/PGMAllBth.h 2007-12-18 14:54:48.000000000 +0000
-@@ -1955,7 +1955,7 @@ PGM_BTH_DECL(int, SyncPT)(PVM pVM, unsig
- {
- GCPhys = PdeSrc.u & GST_PDE4M_PG_MASK;
- # if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE == PGM_TYPE_32BIT
-- GCPhys |= GCPtrPage & BIT(X86_PAGE_2M_SHIFT);
-+ GCPhys |= GCPtrPage & RT_BIT(X86_PAGE_2M_SHIFT);
- # endif
- rc = pgmPoolAlloc(pVM, GCPhys, BTH_PGMPOOLKIND_PT_FOR_BIG, SHW_POOL_ROOT_IDX, iPDDst, &pShwPage);
- }
-@@ -3012,7 +3012,7 @@ PGM_BTH_DECL(unsigned, AssertCR3)(PVM pV
- }
- GCPhysGst = PdeSrc.u & GST_PDE4M_PG_MASK;
- # if PGM_SHW_TYPE == PGM_TYPE_PAE && PGM_GST_TYPE == PGM_TYPE_32BIT
-- GCPhysGst |= GCPtr & BIT(X86_PAGE_2M_SHIFT);
-+ GCPhysGst |= GCPtr & RT_BIT(X86_PAGE_2M_SHIFT);
- # endif
- }
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMGC/DBGFGC.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMGC/DBGFGC.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMGC/DBGFGC.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMGC/DBGFGC.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -53,7 +53,7 @@ DBGFGCDECL(int) DBGFGCTrap01Handler(PVM
- Assert(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8);
- for (unsigned iBp = 0; iBp < ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
- {
-- if ( (uDr6 & BIT(iBp))
-+ if ( (uDr6 & RT_BIT(iBp))
- && pVM->dbgf.s.aHwBreakpoints[iBp].enmType == DBGFBPTYPE_REG)
- {
- pVM->dbgf.s.iActiveBp = pVM->dbgf.s.aHwBreakpoints[iBp].iBp;
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/DBGFR0.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/DBGFR0.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/DBGFR0.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/DBGFR0.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -51,7 +51,7 @@ DBGFR0DECL(int) DBGFR0Trap01Handler(PVM
- Assert(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8);
- for (unsigned iBp = 0; iBp < ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
- {
-- if ( (uDr6 & BIT(iBp))
-+ if ( (uDr6 & RT_BIT(iBp))
- && pVM->dbgf.s.aHwBreakpoints[iBp].enmType == DBGFBPTYPE_REG)
- {
- pVM->dbgf.s.iActiveBp = pVM->dbgf.s.aHwBreakpoints[iBp].iBp;
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWACCMR0A.asm virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWACCMR0A.asm
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWACCMR0A.asm 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWACCMR0A.asm 2007-12-18 14:54:48.000000000 +0000
-@@ -180,7 +180,7 @@ BEGINPROC VMXStartVM
- ; * - LDTR (reset to 0)
- ; * - DRx (presumably not changed at all)
- ; * - DR7 (reset to 0x400)
-- ; * - EFLAGS (reset to BIT(1); not relevant)
-+ ; * - EFLAGS (reset to RT_BIT(1); not relevant)
- ; *
- ; */
-
-@@ -359,7 +359,7 @@ BEGINPROC VMXResumeVM
- ; * - LDTR (reset to 0)
- ; * - DRx (presumably not changed at all)
- ; * - DR7 (reset to 0x400)
-- ; * - EFLAGS (reset to BIT(1); not relevant)
-+ ; * - EFLAGS (reset to RT_BIT(1); not relevant)
- ; *
- ; */
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWSVMR0.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWSVMR0.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWSVMR0.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWSVMR0.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -64,16 +64,16 @@ HWACCMR0DECL(int) SVMR0Setup(PVM pVM)
- /* Program the control fields. Most of them never have to be changed again. */
- /* CR0/3/4 reads must be intercepted, our shadow values are not necessarily the same as the guest's. */
- /** @note CR0 & CR4 can be safely read when guest and shadow copies are identical. */
-- pVMCB->ctrl.u16InterceptRdCRx = BIT(0) | BIT(3) | BIT(4) | BIT(8);
-+ pVMCB->ctrl.u16InterceptRdCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4) | RT_BIT(8);
-
- /*
- * CR0/3/4 writes must be intercepted for obvious reasons.
- */
-- pVMCB->ctrl.u16InterceptWrCRx = BIT(0) | BIT(3) | BIT(4) | BIT(8);
-+ pVMCB->ctrl.u16InterceptWrCRx = RT_BIT(0) | RT_BIT(3) | RT_BIT(4) | RT_BIT(8);
-
- /* Intercept all DRx reads and writes. */
-- pVMCB->ctrl.u16InterceptRdDRx = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7);
-- pVMCB->ctrl.u16InterceptWrDRx = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7);
-+ pVMCB->ctrl.u16InterceptRdDRx = RT_BIT(0) | RT_BIT(1) | RT_BIT(2) | RT_BIT(3) | RT_BIT(4) | RT_BIT(5) | RT_BIT(6) | RT_BIT(7);
-+ pVMCB->ctrl.u16InterceptWrDRx = RT_BIT(0) | RT_BIT(1) | RT_BIT(2) | RT_BIT(3) | RT_BIT(4) | RT_BIT(5) | RT_BIT(6) | RT_BIT(7);
-
- /* Currently we don't care about DRx reads or writes. DRx registers are trashed.
- * All breakpoints are automatically cleared when the VM exits.
-@@ -379,7 +379,7 @@ HWACCMR0DECL(int) SVMR0LoadGuestState(PV
- /* Also catch floating point exceptions as we need to report them to the guest in a different way. */
- if (!pVM->hwaccm.s.fFPUOldStyleOverride)
- {
-- pVMCB->ctrl.u32InterceptException |= BIT(16);
-+ pVMCB->ctrl.u32InterceptException |= RT_BIT(16);
- pVM->hwaccm.s.fFPUOldStyleOverride = true;
- }
- }
-@@ -436,7 +436,7 @@ HWACCMR0DECL(int) SVMR0LoadGuestState(PV
- {
- /** @todo DR0-6 */
- val = pCtx->dr7;
-- val &= ~(BIT(11) | BIT(12) | BIT(14) | BIT(15)); /* must be zero */
-+ val &= ~(RT_BIT(11) | RT_BIT(12) | RT_BIT(14) | RT_BIT(15)); /* must be zero */
- val |= 0x400; /* must be one */
- #ifdef VBOX_STRICT
- val = 0x400;
-@@ -480,9 +480,9 @@ HWACCMR0DECL(int) SVMR0LoadGuestState(PV
- #ifdef DEBUG
- /* Intercept X86_XCPT_DB if stepping is enabled */
- if (DBGFIsStepping(pVM))
-- pVMCB->ctrl.u32InterceptException |= BIT(1);
-+ pVMCB->ctrl.u32InterceptException |= RT_BIT(1);
- else
-- pVMCB->ctrl.u32InterceptException &= ~BIT(1);
-+ pVMCB->ctrl.u32InterceptException &= ~RT_BIT(1);
- #endif
-
- /* Done. */
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWVMXR0.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWVMXR0.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWVMXR0.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWVMXR0.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -683,7 +683,7 @@ HWACCMR0DECL(int) VMXR0LoadGuestState(PV
- /* Also catch floating point exceptions as we need to report them to the guest in a different way. */
- if (!pVM->hwaccm.s.fFPUOldStyleOverride)
- {
-- rc = VMXWriteVMCS(VMX_VMCS_CTRL_EXCEPTION_BITMAP, HWACCM_VMX_TRAP_MASK | BIT(16));
-+ rc = VMXWriteVMCS(VMX_VMCS_CTRL_EXCEPTION_BITMAP, HWACCM_VMX_TRAP_MASK | RT_BIT(16));
- AssertRC(rc);
- pVM->hwaccm.s.fFPUOldStyleOverride = true;
- }
-@@ -774,7 +774,7 @@ HWACCMR0DECL(int) VMXR0LoadGuestState(PV
- {
- /** @todo DR0-6 */
- val = pCtx->dr7;
-- val &= ~(BIT(11) | BIT(12) | BIT(14) | BIT(15)); /* must be zero */
-+ val &= ~(RT_BIT(11) | RT_BIT(12) | RT_BIT(14) | RT_BIT(15)); /* must be zero */
- val |= 0x400; /* must be one */
- #ifdef VBOX_STRICT
- val = 0x400;
-@@ -1037,7 +1037,7 @@ ResumeExecution:
- * - LDTR (reset to 0)
- * - DRx (presumably not changed at all)
- * - DR7 (reset to 0x400)
-- * - EFLAGS (reset to BIT(1); not relevant)
-+ * - EFLAGS (reset to RT_BIT(1); not relevant)
- *
- */
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWVMXR0.h virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWVMXR0.h
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMR0/HWVMXR0.h 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMR0/HWVMXR0.h 2007-12-18 14:54:48.000000000 +0000
-@@ -102,7 +102,7 @@ HWACCMR0DECL(int) VMXR0RunGuestCode(PVM
- if (pCtx->reg && pCtx->reg##Hid.Attr.n.u1Present == 1) \
- val = pCtx->reg##Hid.Attr.u | X86_SEL_TYPE_ACCESSED; \
- else \
-- val = 0x10000; /* Invalid guest state error otherwise. (BIT(16) = Unusable) */ \
-+ val = 0x10000; /* Invalid guest state error otherwise. (RT_BIT(16) = Unusable) */ \
- \
- rc |= VMXWriteVMCS(VMX_VMCS_GUEST_##REG##_ACCESS_RIGHTS, val);
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac 2007-12-18 14:54:48.000000000 +0000
-@@ -326,7 +326,7 @@ htg_debug_regs_guest_no:
- mov ecx, MSR_K7_PERFCTR3
- wrmsr
-
-- mov eax, BIT(20) | BIT(17) | BIT(16) | 076h
-+ mov eax, RT_BIT(20) | RT_BIT(17) | RT_BIT(16) | 076h
- mov ecx, MSR_K7_EVNTSEL0
- wrmsr
- mov eax, 02329B000h
-@@ -340,7 +340,7 @@ htg_debug_regs_guest_no:
- mov dword [eax], 0400h ; APIC_DM_NMI
-
- xor edx, edx
-- mov eax, BIT(20) | BIT(17) | BIT(16) | 076h | BIT(22) ;+EN
-+ mov eax, RT_BIT(20) | RT_BIT(17) | RT_BIT(16) | 076h | RT_BIT(22) ;+EN
- mov ecx, MSR_K7_EVNTSEL0
- wrmsr
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/testcase/tstCompiler.cpp virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/testcase/tstCompiler.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/VBox/VMM/testcase/tstCompiler.cpp 2007-08-30 15:16:22.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/VMM/testcase/tstCompiler.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -130,7 +130,7 @@ void SetWriteDirtyAccessedClearAVL(PX86P
- pPte->n.u1Write = 1;
- pPte->n.u1Dirty = 1;
- pPte->n.u1Accessed = 1;
-- pPte->u &= ~BIT(10);
-+ pPte->u &= ~RT_BIT(10);
- }
-
-
-@@ -139,31 +139,31 @@ void SetWriteDirtyAccessedClearAVL64(PX8
- pPte->n.u1Write = 1;
- pPte->n.u1Dirty = 1;
- pPte->n.u1Accessed = 1;
-- pPte->u &= ~BIT(10); /* bad, but serves as demonstration. */
-+ pPte->u &= ~RT_BIT(10); /* bad, but serves as demonstration. */
- }
-
-
- bool Test3232(X86PTEPAE Pte)
- {
-- return !!(Pte.u & BIT(10));
-+ return !!(Pte.u & RT_BIT(10));
- }
-
-
- bool Test3264(X86PTEPAE Pte)
- {
-- return !!(Pte.u & BIT64(10));
-+ return !!(Pte.u & RT_BIT_64(10));
- }
-
-
- bool Test6432(X86PTEPAE64 Pte)
- {
-- return !!(Pte.u & BIT(10));
-+ return !!(Pte.u & RT_BIT(10));
- }
-
-
- bool Test6464(X86PTEPAE64 Pte)
- {
-- return !!(Pte.u & BIT64(10));
-+ return !!(Pte.u & RT_BIT_64(10));
- }
-
-
-diff -Naurp virtualbox-ose-1.5.2-dfsg2.orig/src/recompiler/VBoxREMWrapper.cpp virtualbox-ose-1.5.2-dfsg2/src/recompiler/VBoxREMWrapper.cpp
---- virtualbox-ose-1.5.2-dfsg2.orig/src/recompiler/VBoxREMWrapper.cpp 2007-10-18 11:07:28.000000000 +0000
-+++ virtualbox-ose-1.5.2-dfsg2/src/recompiler/VBoxREMWrapper.cpp 2007-12-18 14:54:48.000000000 +0000
-@@ -246,7 +246,7 @@ typedef const REMPARMDESC *PCREMPARMDESC
- /** The parameter type mask. */
- #define REMPARMDESC_FLAGS_TYPE_MASK 15
- /** The parameter size field is valid. */
--#define REMPARMDESC_FLAGS_SIZE BIT(7)
-+#define REMPARMDESC_FLAGS_SIZE RT_BIT(7)
- /** @} */
-
- /**
-@@ -286,9 +286,9 @@ typedef const REMFNDESC *PCREMFNDESC;
- /** The return type mask. */
- #define REMFNDESC_FLAGS_RET_TYPE_MASK 7
- /** The argument list contains one or more va_list arguments (i.e. problems). */
--#define REMFNDESC_FLAGS_VALIST BIT(6)
-+#define REMFNDESC_FLAGS_VALIST RT_BIT(6)
- /** The function has an ellipsis (i.e. a problem). */
--#define REMFNDESC_FLAGS_ELLIPSIS BIT(7)
-+#define REMFNDESC_FLAGS_ELLIPSIS RT_BIT(7)
- /** @} */
-
- /**
Deleted: trunk/debian/patches/13-no-64bit-guest.dpatch
===================================================================
--- trunk/debian/patches/13-no-64bit-guest.dpatch 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/patches/13-no-64bit-guest.dpatch 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,50 +0,0 @@
-#! /bin/sh /usr/share/dpatch/dpatch-run
-## 13-no-64bit-guest.dpatch by Michael Meskes <meskes at debian.org>
-##
-## All lines beginning with `## DP:' are a description of the patch.
-## DP: Do not build guest utils on 64 bit architectures
-
- at DPATCH@
-
---- virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/Makefile.kmk.orig 2007-10-18 13:07:28.000000000 +0200
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/Makefile.kmk 2007-12-23 13:49:48.000000000 +0100
-@@ -22,10 +22,13 @@
- ifeq ($(filter-out linux l4, $(BUILD_TARGET)),)
- SUBDIRS += \
- module \
-+ sharedfolders
-+endif
-+ifeq ($(filter-out x86, $(BUILD_TARGET_ARCH)),)
-+SUBDIRS += \
- daemon \
- xgraphics \
- xmouse \
-- sharedfolders \
- xclient
- endif
-
---- virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.kmk.orig 2007-08-30 17:16:27.000000000 +0200
-+++ virtualbox-ose-1.5.2-dfsg2/src/VBox/Additions/linux/sharedfolders/Makefile.kmk 2007-12-23 13:50:36.000000000 +0100
-@@ -20,7 +20,10 @@
- ifdef VBOX_WITH_LINUX_ADDITIONS_32BIT_R0
- SYSMODS = vboxvfs
- endif
--PROGRAMS = mountvboxsf
-+PROGRAMS =
-+ifeq ($(filter-out x86, $(BUILD_TARGET_ARCH)),)
-+PROGRAMS += mountvboxsf
-+endif
- INSTALLS = vboxvfs-bin vboxvfs-sh
-
- #
---- virtualbox-ose-1.5.2-dfsg2/configure.orig 2007-12-23 15:15:43.000000000 +0100
-+++ virtualbox-ose-1.5.2-dfsg2/configure 2007-12-23 15:16:44.000000000 +0100
-@@ -230,7 +230,7 @@
- check_environment()
- {
- test_header environment
-- BUILD_CPU=`uname -m`
-+ BUILD_CPU=`dpkg --print-architecture`
- case "$BUILD_CPU" in
- i[3456789]86|x86|i86pc)
- BUILD_MACHINE='x86'
Modified: trunk/debian/rules
===================================================================
--- trunk/debian/rules 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/rules 2007-12-29 14:04:20 UTC (rev 163)
@@ -63,6 +63,9 @@
rm -f ./include/VBox/VBoxGuest.mac
rm -f ./src/libs/xpcom18a4/xpcom/MoreFiles/FSCopyObject.c
rm -f ./src/libs/xpcom18a4/xpcom/MoreFiles/FSCopyObject.h
+ rm -f ./src/VBox/HostServices/SharedClipboard/linux-stub.cpp
+ rm -f ./src/VBox/Additions/linux/xmouse/Imakefile
+ rm -rf ./src/VBox/Additions/linux/selinux-fedora
rm -rf ./debian/
find . -type d -name '.svn' | xargs rm -rf;
cd .. && mv VirtualBox-1.5.4_OSE virtualbox-ose-1.5.4-dfsg && \
Modified: trunk/debian/virtualbox-ose.install
===================================================================
--- trunk/debian/virtualbox-ose.install 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/virtualbox-ose.install 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,6 +1,6 @@
debian/virtualbox-ose.files/vbox.cfg /etc/vbox
debian/virtualbox-ose.files/interfaces /etc/vbox
-debian/virtualbox-ose.files/VBox.sh /usr/lib/virtualbox
+debian/virtualbox-ose.files/*.sh /usr/share/virtualbox
debian/virtualbox-ose.files/virtualbox-ose.desktop /usr/share/applications
debian/virtualbox-ose.files/virtualbox-ose.xpm /usr/share/pixmaps
@@ -12,7 +12,6 @@
out/bin/VBox*.so /usr/lib/virtualbox
out/bin/VBox*.gc /usr/lib/virtualbox
out/bin/VBox*.r0 /usr/lib/virtualbox
-out/bin/VBoxAddIF.sh /usr/lib/virtualbox
out/bin/VBoxBFE /usr/lib/virtualbox
out/bin/VBoxManage /usr/lib/virtualbox
out/bin/VBoxSDL /usr/lib/virtualbox
Modified: trunk/debian/virtualbox-ose.links
===================================================================
--- trunk/debian/virtualbox-ose.links 2007-12-29 11:44:01 UTC (rev 162)
+++ trunk/debian/virtualbox-ose.links 2007-12-29 14:04:20 UTC (rev 163)
@@ -1,12 +1,12 @@
/usr/lib/virtualbox/xpidl /usr/share/virtualbox/sdk/bin/xpidl
-/usr/lib/virtualbox/VBox.sh /usr/bin/vditool
-/usr/lib/virtualbox/VBox.sh /usr/bin/vboxmanage
-/usr/lib/virtualbox/VBox.sh /usr/bin/vboxsdl
-/usr/lib/virtualbox/VBox.sh /usr/bin/virtualbox
-/usr/lib/virtualbox/VBox.sh /usr/bin/VBoxManage
-/usr/lib/virtualbox/VBox.sh /usr/bin/VBoxSDL
-/usr/lib/virtualbox/VBox.sh /usr/bin/VirtualBox
+/usr/share/virtualbox/VBox.sh /usr/bin/vditool
+/usr/share/virtualbox/VBox.sh /usr/bin/vboxmanage
+/usr/share/virtualbox/VBox.sh /usr/bin/vboxsdl
+/usr/share/virtualbox/VBox.sh /usr/bin/virtualbox
+/usr/share/virtualbox/VBox.sh /usr/bin/VBoxManage
+/usr/share/virtualbox/VBox.sh /usr/bin/VBoxSDL
+/usr/share/virtualbox/VBox.sh /usr/bin/VirtualBox
/usr/bin/VboxTAP /usr/bin/VBoxAddIF
/usr/bin/VboxTAP /usr/bin/VBoxDeleteIF
@@ -14,4 +14,4 @@
/usr/share/virtualbox/VBox.png /usr/share/icons/virtualbox.png
/usr/lib/virtualbox/VBoxTunctl /usr/bin/VBoxTunctl
-/usr/lib/virtualbox/VBoxAddIF.sh /usr/bin/VBoxTAP
+/usr/share/virtualbox/VBoxAddIF.sh /usr/bin/VBoxTAP
More information about the Pkg-virtualbox-commits
mailing list